APB Bridge in QSYS

[SK_VA]

Hi,

I am using Cyclone V SOC in design. How to connect the axi bridge of Cyclone V Hard Processor System to an APB Slave outside the platform design 

[EBERLAZARE_I_Intel]

Hi,

It is recommended that you do the interconnection inside the platform designer, this is because for your case there will be a APB translator needed since you are connecting two different interfaces which the HPS is actually an AXI interface and you want to connect it to your APB interface. By doing the interconnection inside Platform Designer, it will automatically creates the translator and do it for you.

Firstly, you need to bring in your logic inside the platform designer. You can use the add "new component" in platform designer.

Secondly, you can connect the APB interface slave to your HPS, but do keep in mind you need to set the correct base address, for example if you're connecting to the h2f bridge master you need to set the base address as below:

https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/hps.html#topic/hnm1474855535682.html#hnm1474855535682

We do not recommend doing the connection/export outside of Platform Designer. Please follow the above steps. Let me know if more help needed.

[SK_VA]

Hi,

Thanks a lot for the response. It was helpful.

Can we do a similar connection of APB slave with NIOS II via Avalon interface.

Regards,

Sanju 

[EBERLAZARE_I_Intel]

Hi,

Yes you can, still though it recommended highly that you bring in the logic of the APB interface slave and do the interconnections inside the Platform Designer, so that it can automatically handles the different interfaces interconnection for you.