Im encountering an issue where when configuring over active serial the FPGA (a cyclone IV EP4CE22E22) keeps reloading the data from the Flash chip. The data is being loaded onto the flash chip using the serial flash loader over jtag, and the data on the chip has been verified using the programmer. I have looked at the data and clock signals at both the flash chip and FPGA with a scope and the signals look fine. I have tested the data loaded onto the flash chip on an earlier version of the board which has the same flash chip and FPGA and it is loaded fine on that board. Does anyone have any ideas as to what might be causing this.