Agilex 5 Unused HSIO Banks

[Nicole04]

Good day,

I would like to confirm that the following statement in Table 13 of the Pin Connection Guidelines: Agilex 5 FPGAs and SoCs document refers to individual banks from the HSIO group:

Connect unused I/O bank power to GND and I/O pins floating if the I/O bank will not be used in future. Do not leave the VCCIO_PIO floating.

Does this mean if I only use HSIO bank 3A and HSIO bank 2A, I should ground the VCCIO_PIO pins of HSIO banks 2B and 3B?

Kind regards,

Nicole

[Ash_R_Intel]

Hi,

The VCCIO_PIO should be connected to GND, 1.0 V, 1.05 V, 1.1 V, 1.2 V, or 1.3 V depending on your future usability. Do not leave it unconnected.

So, if 3B and 2B will be totally unused in future as well, you may consider it connecting to GND to save power.

Regards

[Nicole04]

If the power pins of bank 3B and 2B are connected to GND, but the 3A and 2A banks are powered, will this cause problems?

[Ash_R_Intel]

Hi,

Hope my previous comment resolved your query. Hence, closing the case. However, it will be open for the community members to comment upon.

Regards