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Dear all,
Provide us the inputs to test AVST mode using HPS?
What are the files required for FPGA Configuration & HPS (U-boot & Linux) ?
We are using EMMC as booting device.
Thanks & Regards
Raju S
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Hi raju1421,
May I know what specific Agilex board that you are using?
I will try to find more information about that.
Thanks.
Regards,
Aik Eu
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Hi @aikeu ,
We are using Intel® Agilex™ F-Series Transceiver SoC Development Kit,
Provide us the inputs to test AVST mode using HPS?
What are the files required for FPGA Configuration & HPS (U-boot & Linux) ?
We are using EMMC as booting device.
But in the below link there are steps for AS mode not for AVST mode.
Agilex 7 SoC With eMMC Storage On HPS | Projects | RocketBoards.org
Thanks & Regards
Raju S
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Hi raju1421,
Can check out the below document related to Avalon ST application for Agilex.
https://www.intel.com/content/www/us/en/docs/programmable/683673/21-3/avalon-st-configuration.html
Thanks.
Regards,
Aik Eu
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Hi @aikeu ,
I have gone through the link shared by you,but there are no steps for generating linux images as mentioned eariler.
Please provide steps for generating linux & fpga images for AVST Mode.
Thanks & Regards
Raju S
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Hi raju1421,
Referring to the document Overview block diagram to generate the jIC file:
For the GHRD, you will set the device configuration scheme for AVST and compile it in quartus.
The AVST works on the FSBL only but not the SSBL. When generating the .jic file for flashing the qspi flash change the mode to AVST setting according to the configuration scheme instead. Example: -o mode=AVSTX32
Thanks.
Regards,
Aik Eu
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Hi raju1421,
I will close-pending this case if no further question.
Thanks.
Regards,
Aik EU
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