Altera Cyclone V Sockit - Internal Oscillator Clock Source?

[Altera_Forum]

internal oscillator for the initialization clock 

 I have a Altera Cyclone V Sockit Development board and are using the Internal Oscillator as the initialization clock source for all my FPGA images.   I was just wondering where this internal oscillator is sourced and what are the requirements of this initialization process?  Is it generated internally? Is it part of the architecture of EPCQ Flash on the FPGA side? Do I need any clocks on the FPGA running for this initialization clock to work correctly?  Thanks  Kyle

[Altera_Forum]

Internal configuration clock is the standard option. The internal FPGA oscillator has a rather wide (about 1:2) frequency specification. If you want fastest configuration for some reason, switching to an external configuration clock (user clock) might be reasonable.