Arria 10系列FPGA供电问题

[smile123]

各位intel官网技术支持人员好，我现在设计的板子有以下的问题。

描述：使用Arria 10系列的FPGA，具体信型号10AS027E4F29I3LG。

问题1：在使用LVDS的IP核解码的时候使用一个BANK进行数据解码，目前该BANK的电源引脚少接了一个(即悬空了一个VCCIO引脚)，但是我在测试的时候一切正常，那么后续可能会有其他问题吗?

     该BANK解码8组LVDS数据，速率960Mbps。

疑问1：是否BANK的内部电源引脚已经连接到一起？

[AqidAyman_Intel]

Hello,

Thank you for reaching out to us.

May I know which I/O bank that you mentioned here? And also, what is you mean of the power pin of the bank was missing? Can you give more clarification?

Regards,

Aqid

[smile123]

Sorry, I only replied to you now，the bank is 2A, and the pin is AA15 that not connected to 1.8V-VCCIO.

[AqidAyman_Intel]

As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.