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Arria 10 - FPGA Boot

GregD
Beginner
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Hello. I am working on an Arria 10 project. Using ARM development studio and USB-Blaster I can load and run u-boot, do an NFS mount of the rootfs, and program the eMMC. Afterward, the board successfully boots u-boot 2021.04, programs the FPGA, and runs Linux 5.10.70. I need to create an sof that has integrated u-boot that our production can load and run from the USB-Blaster to be able to perform eMMC programming. I have not been able to find documentation that describes how to create the hex format version of u-boot from compiled u-boot binaries that is needed to create the sof.

Which u-boot binary to use? u-boot-dtb.bin?

How to convert to hex?  arm-linux-gnueabi-objcopy?

etc.

Thanks

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sstrell
Honored Contributor III
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A .sof file cannot include this.  It's strictly for programming the FPGA.  You need a drive image that includes the .sof along with u-boot, etc.

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GregD
Beginner
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Thanks for the response.

Currently, for this product, there is a .sof that production uses that runs u-boot v2014.10 when in boot-from-FPGA.

~/intelFPGA/21.1/nios2eds/nios2_command_shell.sh \
quartus_pgm -c 1 -m jtag -o "p;boardCheckEmmcProg.sof"

I am trying to recreate boardCheckEmmcProg.sof with newer u-boot v2021.04 but I do not know how to create the hex file that our FPGA engineer needs to create the .sof.

My question:

Which u-boot binary to use? u-boot-dtb.bin?

How to convert to hex?  arm-linux-gnueabi-objcopy?

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EricMunYew_C_Intel
Moderator
731 Views

You can refer to below for FPGA boot in Arria 10 SoC.

https://rocketboards.org/foswiki/Documentation/UBootA10FPGABoot

Below is the command to generate U boot in hex.

% arm-altera-eabi-objcopy -I binary -O ihex --adjust-vma -0x00000000 u-boot_w_dtb.bin hpsBootTarget.hex


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GregD
Beginner
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Yes, I was using the steps in https://rocketboards.org/foswiki/Documentation/UBootA10FPGABoot. The difference is that there is no longer a BSP editor in Intel SoC FPGA Embedded Development Suite v21.1. 

"As part of the continuous enhancement of tools flow, Arria10 SoC BSP Generator functionality is now merged into U-Boot flow. "

I did change #define CONFIG_SYS_TEXT_BASE 0xc0000000, compiled u-boot, and ran:

arm-altera-eabi-objcopy -I binary -O ihex --adjust-vma -0x00000000 u-boot-dtb.bin u-boot.hex

The boot-from-FPGA did not work with the sof generated using the u-boot.hex. My guess is there is some additional configuration needed in u-boot (or the Qsys project).

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EricMunYew_C_Intel
Moderator
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You can enable the FPGA boot in Arria 10 GHRD and Qsys, and refer to below for the changes required.

And the boot loader u-boot-socfpga must be rebuilt again to generate u-boot_w_dtb.bin for boot from the FPGA.

https://rocketboards.org/foswiki/Documentation/A10GSRD151FPGABoot


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IMura
Novice
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Hello,

I am having the same problem as the original poster. Following the link you provided doesn't help, like what GregD told you, the BSP Editor is no longer available in later versions, and the u-boot flow has changed (instead of having one .bin file for the whole uboot, now we have 2 files : spl/u-boot-splx4.sfp to put on the A2 type partition of the emmc, and the u-boot.img to put into the fat type partition). Which one should be used to be converted into the hex file? And how? Using objcopy on these ones will create big hex files!

 

What happened to this boot HPS from FPGA method? Did Intel decide to not support this method anymore, leaving customers in difficulty?

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cdelbegue
Beginner
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Hi GregD,

 

Have you solved your issue and be able to integrate u-boot 2021.04 in a .sof to use the FPGA boot feature?

 

I am also interested in this feature, but I failed to build a working binary.

I already have a working u-boot with version 2014.10, and I am trying to migrate to version 2021.07.

 

I tried to transpose https://www.rocketboards.org/foswiki/Documentation/A10GSRD151FPGABoot to u-boot 2021.07 without success :

1. Add the devicetree node:

	config {
		load-environment = <0>;
	};


2. Set the CONFIG_SPL_TEXT_BASE in the defconfig to 0xC0000000 (instead of setting the #define CONFIG_SYS_TEXT_BASE)

 

3. Edit the file arch/arm/mach-socfpga/board.c (instead of the file board/altera/socfpga_arria10/socfpga_common.c):

int board_init(void)
{
	/* Address of boot parameters for ATAG (if ATAG is used) */
	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

	/* Disable security / privilege in the A10 NOC to allow masters to write to FPGA OCM */
	writel(0x03fe0101, 0xFFD13500);
	//noc_fw_soc2fpga_soc2fpga_scr:lwsoc2fpga: Allow unsecured accesses from all masters When cleared (0) secure access only
	writel(0x03fe0101, 0xFFD13504);
	//noc_fw_soc2fpga_soc2fpga_scr:soc2fpga: Allow unsecured accesses from all masters When cleared (0) secure access only
	writel(0xffffffff, 0xFFD11004);
	//noc_l4_priv_l4_priv_filter: Allow all peripherals to accept non privileged accesses. (When cleared (0) only privileged access are allowed)

	return 0;
}

 

4. Convert the generated preloader image u-boot-with-spl.bin to Intel .hex format:

arm-poky-linux-gnueabi-objcopy -I binary -O ihex --adjust-vma -0x00000000 u-boot-with-spl.bin hpsBootTarget.hex

 

Any suggestions ?

 

Best regards,

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