Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Arria 10 series has dedicated 3 CS for the flash devices.

SB_S
Beginner
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What is the use case of 3 Chip select of the external flash device ?

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YuanLi_S_Intel
Employee
599 Views

Hi SB S,

 

The number of chip select available means that the device is capable to connect to the number of external flash devices. You may have different configuration file store in each flash devices so that your FPGA can be reprogrammed easily.

 

Regards,

YL

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SB_S
Beginner
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So By default we connect CS_0 ​to the flash device. If we have 3 flash devices and if FPGA wants to fetch the configuration file from 2nd flash , how it asserts the CS_1 ?

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YuanLi_S_Intel
Employee
599 Views

Hi SB S,

 

To enable the communication between FPGA and the 2nd flash devices, which is connected to CS_1, all you need to do is just driving the CS pin low. You may refer to Arria 10 handbook for more information about it.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/a10_handbook.pdf (Page 231)

 

Regards,

YL

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SB_S
Beginner
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In the above document  it says , the FPGA tries to load the configuration file 3 times if it fails initially. Does this mean , it asserts the cs_0 first then if don't find a valid file ,assert the cs_1 , then cs_2 .. Is it so And if we have valid configuration file in all the flash devices and if i need to select the second flash , how can user pull the CS_1 ? It has to be from FPGA right ?

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SB_S
Beginner
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​Hi can you please reply for this query ?

 

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YuanLi_S_Intel
Employee
599 Views

Hi SB S,

 

By default, it will configure the FPGA with configuration devices connected to nCS[0]. Then later on, user can reconfigure the FPGA in user mode with configuration data in another configuration devices connecting to nCS[1] or nCS[2] with a host.

 

Regards,

YL

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