Arria II nSTATUS pin stays low ... for ever !

[Altera_Forum]

I am sure I am doing something stupid but this is beginning to bug me now so just in case someone has any fresh ideas....... 

 I am working on a new board design which uses an Arria II GX and also an Arria V [but not really started on the AV part yet]. This work has been going on for a while and I have been building the application for the Arria II  AII is configured using AS mode from an EPCS128 part and contains amongst other things a Nios II some DDR memory and Ethernet. The general idea is that when that's all running it will in turn configure the ArriaV part where all the clever stuff goes on.  Now just over a week ago I started running into problems where the AII would not configure at all ..... on power up just sits there and does nothing !! This wasn't every time and at first I thought that maybe I was doing something funny in the code. Went back several versions and same thing.  Eventually I could not get the configuration to run at all and that's how its been for the last week.  On checking I found that the nSTATUS line was always low from power up so it looks very much like the device is never coming out of POR.  I have checked ALL of the power supplies and find that they all start up quite nicely and together in about 4ms .... I am using the standard 100mS POR so all should be fine. The device is fully powered up 0V9 Core and a mix of 1V8 [for the DDR2] and 2V5 rails [LVDS] and 1 bank of 3V3 pins for things like i2C and some led's. These rails come from DCDC modules [Texas Instruments] mounted on the board ... plenty of current available.  There are some LDO's to drive the PLL and VCCA rails and those are all looking good and measuring the right voltage. Also we are not using any security features so I have Vbatt hard wired to 3V3 along with the VccPD and VccIO for the configuration banks.  Eventually I gave up trying to work it out and tried to configure the Arria II using JTAG.  This starts off well and gets to 95% before failing and complaining that the CONF_DONE pin does not go high. Admittedly I did not try JTAG configuration before having this problem so I don't know if it was working before however it was OK for NiOS Debug and I had been writing and uploading C-Code quite successfully.  Finally I decided that I must have blown something up on the board ! So as we have 5 prototype built I decided to try another... Same Problem exactly. And again on a third board. I don't want to run the last two just in case I am doing some damage here.  So sorry about the long winded explanation but final question is ... Apart from Power supply issues is there any other reason for nSTATUS to stay low [I have checked and I don't even get a pulse on this pin -- which has a 10K pullup to 3V3].  As far as I can tell there is no attempt to read any data from the EPCS128 memory [Dclk is high] so I don't think it's a config error.  BTW nCE is pulled low and I have tried holding nCONFIG low until some time after power up before raising it up again. Also MODE SEL is hard wired to 1110 [3v3 and GND]  I can't think of anything else to do so maybe I will be waiting in the bar.:(

[Altera_Forum]

I have an same problem about nstatus. There are 2 deivces on the JTAG chain. The first board works well. The nstatus keep low when i debug the second board. So when i download thru SignalTap II one by one, an error appears as "config_done does not go high". It's stange that these two devices can be download correctly thru programmer. 

 What's your problem's status?