I would like to perform a boundary scan on the device before the heatsink is applied.
I am wondering what the power dissipation is during boundary scan (JTAG) mode? I want to make sure it will not overheat.
- Arria® V SX SoC FPGA
Performing boundary scan will not impact any heat as the device is still in idle. You can get the BSDL (boundary-scan description language ) file from https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout... where you can use it to performed testing.
If you will power on the device, hold it in reset, and perform boundary scan before allowing it to begin configuration, then the power should be very low. Unfortunately, this power is not specified, but will not exceed the static power of an empty device. So my suggestion is to use the EPE to model the device with the HPS off and no resources instantiated (remember to use MAX power model), and specify the heat sink as None, and see what you get.
Let me know if you have questions :-).