ArriaVGX で JTAG機能を無効にできますか。 - Intel Community

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

ArriaVGX で JTAG機能を無効にできますか。

671 Views

Ex. TRST = Disable , QuartusII Settings etc...

Target Device : 5AGXBA5D6F31C6N, 5AGXMA7G4F31I3N

Link Copied

1 Reply

253 Views

Hi KJalte2,

Yes, you can disable JTAG access in Arria V using Design Security Features in Intel FPGAs. You can control various level of JTAG access control.

You may refer to the following document for more details:

AN 556: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an556.pdf

Arria V handbook (page 319): https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-v/av_5v2.pdf#page=319

I hope this will help.

Thanks😉

Copy link

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.