Bug ID 1507857411 and 14010984010, Transceivers not preserved when device remains unprogrammed

[AHart2]

Dear,

I recently became aware about the notification about degrading transceiver performance in Stratix 10 and Arria 10 Devices when the device remains unprogrammed.

Also see:

https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/hsio/2021/transceivers-are-not-preserved-when-the-device-remains-unprogram.html

According to the notification clause B the device shall not remain unprogrammed for a cumulative period of less than one year. Does this mean that the device may not be in a powered and unprogrammed state or is this also applicable for the unpowered state ?

All the Best,

Andre

[Deshi_Intel · Accepted solution]

Hi Andre,

I understand that you are referring to ADV2116.

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/pcn/adv2116.pdf

According to A10 user guide doc (page 398, chapter 3.8. Unused/Idle Clock Line Requirements)

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/ug_arria10_xcvr_phy.pdf
• Unused or idle transceiver clock lines can degrade if the devices are powered up to normal operating conditions and not configured.
• So unpowered FPGA should not be affected by this issue.

Thanks.

Regards,

dlim

[AHart2]

Hi dlim,

thanks for sharing this, it fully answers my question.
Please close this case.

All the Best,
Andre

[Deshi_Intel]

You are welcome, Andre