Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Bug ID 1507857411 and 14010984010, Transceivers not preserved when device remains unprogrammed

AHart2
New Contributor I
559 Views

 

Dear,

I recently became aware about the notification about degrading transceiver performance in Stratix 10 and Arria 10 Devices when the device remains unprogrammed.

Also see:

https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/hsio/2021/transceivers-are-not-preserved-when-the-device-remains-unprogram.html

According to the notification clause B the device shall not remain unprogrammed for a cumulative period of less than one year. Does this mean that the device may not be in a powered and unprogrammed state or is this also applicable for the unpowered state ?

All the Best,

Andre

 

 

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Deshi_Intel
Moderator
532 Views

Hi Andre,


I understand that you are referring to ADV2116.


According to A10 user guide doc (page 398, chapter 3.8. Unused/Idle Clock Line Requirements)


Thanks.


Regards,

dlim


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3 Replies
Deshi_Intel
Moderator
533 Views

Hi Andre,


I understand that you are referring to ADV2116.


According to A10 user guide doc (page 398, chapter 3.8. Unused/Idle Clock Line Requirements)


Thanks.


Regards,

dlim


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AHart2
New Contributor I
520 Views

Hi dlim,


thanks for sharing this, it fully answers my question.
Please close this case.

All the Best,
Andre

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Deshi_Intel
Moderator
501 Views

You are welcome, Andre


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