Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
Need Forum Guidance? Click here

Search our FPGA Knowledge Articles here.
18988 Discussions

CYCLONE VE development kit problem programming

CHARLES_Antoine
267 Views

Hello, I have a problem with my Cyclon VE development kit.


I can no longer download a program from my kit. When I put the SW4.3 in the ON position (before power on), I notice that the ERR LED (red) is on (after power on) while the LED 18 (LOAD) is off.
I used the board udapte portal to reset the kit but it doesn’t work....

When I do auto-detect on QUARTUS 18.1 the JTAG Debugging chain tells me that the "The TDI connection to the first detected device 5M(1270ZF324|2210Z)/EPM2210 might be shorted to VCC or is an open circuit " and then "the TCK and TMS connections to the device before the first detected device 5M(1270ZF324|2210Z)/EPM2210 might have a problem".

Moreover, when I place the SW4.3 in the OFF position (FACT_LOAD) everything works correctly in the factory program but cannot upload.

I hope to be able to find a solution quite quickly and that the problem is related to the software and not the hardware as the JTAG debugging mentions.....


By saying thank you.


CHARLES Antoine

0 Kudos
1 Solution
CHARLES_Antoine
118 Views

Hello, I contacted a technician when I opened a IPS case. He told me that kit have a electrical problem. Therefore, I return my kit to my supplier.

 

Thanks for your help.

View solution in original post

8 Replies
YuanLi_S_Intel
Employee
225 Views

May i know what issue you had when performing board update portal? is there any error messages?


For your information, you need to switch the switch to OFF position in order to use Board Update Portal.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_cve_fpga_dev_kit.pdf#...


CHARLES_Antoine
220 Views
I haven't error message when performing board update portal. 
During the auto-detect in quartus, I have the message that I indicated. I think the problem comes from the max V.
Its TDI pin does not seem connected according to the jtag debugger
YuanLi_S_Intel
Employee
207 Views

Hi,


Do you mean that you can perform the board update portal but the image is not being loaded correctly?


Can you try to change the TCK frequency to 6MHz?


Regards,

Bruce


CHARLES_Antoine
177 Views
The max V is in error. 

In screenshot, we can see the quartus message. In addition, the MAX V led is in error, in red and I can't detect the Max V en detect chain. How can I fix this problem fast enough? Our supplier Mouser, told us to ask you.

Thank for your response.

CHARLES_Antoine_1-1624352895793.jpeg

 

 

YuanLi_S_Intel
Employee
167 Views

Can you try with changing all switches to default position and set TCK 6Mhz for USB Blaster II?


CHARLES_Antoine
161 Views

Yes, I have already tried. I tried to place the switches in all different possibilities, the Max V always remains in error.

I can upload a program that if I put the Max V in Bypass, but to use the Nios's FPGA, I must be able to detect the Max V to use the flash...

YuanLi_S_Intel
Employee
122 Views

It seems like the content on the flash is having issue as you are not able to configure the image with error LED illuminated. Can you try to restore the flash content?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_cve_fpga_dev_kit.pdf#...


CHARLES_Antoine
119 Views

Hello, I contacted a technician when I opened a IPS case. He told me that kit have a electrical problem. Therefore, I return my kit to my supplier.

 

Thanks for your help.

Reply