We plan to connet INIT_DONE signal to MCU(3.3V) so we could know when A10 FPGA enters user mode.
Although INIT_DONE is an Open-Drain output, however, A10 pin-connection guide.pdf page10 writes that this pin should be pulled up with 10K to VCCPGM, as below picture.
Could it be pulled up to 3.3V ? I think we can do this, but still need confirm with Intel.
Thanks! Merry Christams.
By the way, we use A10 GX device, The Part number is 10AX057H3F34E2SG.
By referring to Arria 10 Device Datasheet, the maximum value of VCCPGM is 1.89V.
When you use the optionally open-drain output dedicated INIT_DONE, you would need to connect this pin to an external 10kohm pull up resistor to VCCPGM. Since the VCCPGM can only be connected to 1.2V, 1.5V and 1.8V power supply, you should NOT pull up to 3.3V.
Wishing you a Happy New Year!
Thanks for answer.
Although PCG doc tells that we shoud pull up this pin to VCCPGM, however, I am not sure about INIT_DONE pin is powered by who. From pin-out file and Quartus Pin Planner, this pin locates at Bank 2A (pin AG18) rahter than Bank CSS. To me, it seems that INIT_DONE should be pull up to VCCIO_Bank2A.....How do you think?
For your information, INIT_DONE is a dual purpose pin which can be used as an I/O pin when not enabled as the INIT_DONE pin. However when you use this pin in configuration mode, you have to enable the INIT_DONE pin in the Intel Quartus Prime Software and connect it to an 10kohm pull up resistor to VCCPGM. It is powered up by VCCPGM when used as dedicated INIT_DONE pin. You can connect it to VCCIO if it is used as an I/O pin.