Can I get which SOF page booted from with Remote Update IP?

[TKudoh]

I am using a multi-SOF page design on Arria10 and Nios II.

Can the Nios II firmware get the SOF page (or boot address) of an FPGA design booted using the Remote Update IP (Avalon-MM I/F)?

It is succeded that, writing the factory and application FPGA design to boot ROM, and if the appliaction side data is broken, fallback to the factory side.
But I don't know how Nios firmware get which FPGA is running.

Regards,

Kudoh

[FvM]

Hello,
there are two options,
1. use the limited info that can be read-out from remote update configuration register
2. embed version info to the FPGA image, e.g. version, git hash, app/factory flag and make it readable for Nios
Regards,
Frank

[TKudoh]

Hi, Frank.

Could you tell me more about option 1?

I created the JIC file that has two SOF pages using  Quartus Convert programing files tool, and I set the option for boot from page1 (Application side).
Then, I confirmed that page 1 is loaded, or fallback to page 0 if page 1 is broken.

RU_RECONFIG_TRIGGER_CONDITIONS register is set as:

• When power on reset, the register is set to 0 (even if fallback to page 0).
• After reconfig from any (not broken)page, the register is set to 4 (reset triggered from logic array).
• After reconfig from broken page1, the register is set to 1 (CRC Error) and fallback to page 0.

All other registers are set to 0.

I can determine the current page with following method:

• Set the boot page as 0 when creating JIC file.
• If RU_RECONFIG_TRIGGER_CONDITIONS is 0, reconfig from page 1.
• If RU_RECONFIG_TRIGGER_CONDITIONS is 4, current page is 1.
• If RU_RECONFIG_TRIGGER_CONDITIONS is 1, current page is 0.

But, this method has two problems:

• It requires long boot time (but it is acceptable).
• Sometimes I want to switch to page 0 from page1 dynamically, but it is difficult.(Switching is possible, but cannot determine running with page 0, because RU_RECONFIG_TRIGGER_CONDITIONS is 4)

Regards,

Kudoh

[aikeu]

Hi TKudoh,

Do you mean it is hard to check which .sof file is being used after the remote update has been performed?

It is possible to have different sof file where you add a sys id(System ID Peripheral Core) in the design to have unique id for checking or reading after the update has been done?

Thanks.

Regards,

Aik Eu

[TKudoh]

Hi, Aik,

I want to get which SOF page was loaded to check if the application side page is broken.

My FPGA design has the version register and Nios firmware can read this, but this value is not one-to one related to the SOF page.

For now, I give up to get the SOF page and use another method.

Thak you.

Regards,
Kudoh

[aikeu]

Hi TKudoh,

Ok, I will close this thread for now.

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

Thanks.

Regards,

Aik Eu