Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20703 Discussions

Can’t route signal to atom

Altera_Forum
Honored Contributor II
‎04-12-2012 07:59 AM
1,132 Views

Hi, 

 

I have encountered this error during compilation: 

 

Error: Can’t route signal "clk~input" to atom "a"  

Error: Can’t fit design in device 

 

I am using Cyclone IV EP4CGX15BF14C8N on Cyclone IV GX Transceiver Kit.  

clk~input is connected to pin V11 and a signal is connected to Pin_G6.  

 

Any clue why this happened? and any resolution to this?  

 

 

Link Copied

1 Reply
TKhan7
Beginner
‎03-05-2019 07:55 AM
397 Views

If you apply both a FAST_INPUT_REGISTER assignment to an I/O and a D3_DELAY assignment to the associated delay chain, compilation might fail with an error similar to the above.

Do not apply both a D3_DELAY assignment and a FAST_INPUT_REGISTER assignment. You may safely apply either assignment, but not both.

Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.