We are using Cyclone 10GX development board for our project. We have designed a FMC daughter card for using it with the FPGA board. The Signal Integrity on our daughter card is closed at >10Gbps data rate. We have configured the SerDes transmitter to send PRBS data on SerDes channel DP0_C2M_P/N. We are using LeCroy SDA813Zi equipment to probe the signal on our daughter card. The signal does not look clean and when we loop back through our daughter card, there is big BER observed on SerDes receiver. At 5Gbps, the BER is good without problems. Can you suggest us any settings on transmitter side to enhance the signal so that the signal seen on our daughter card is clean at 10Gbps? Is there any limitation of SerDes in Cyclone10GX for using at 10Gbps? Eyediagram is attached for your reference.