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AGaru1
Beginner
202 Views

Cannot generate Intel Avalon-MM Intel Stratix 10 Hard IP+ for PCI Express design example on Quartus Prime Pro 19.4.

After clicking generate example design:

Info: avmm_bridge_512_0: Auto-generation of QSYS example design beginning...

 

Info: avmm_bridge_512_0: Validating example design parameters and selection...

 

Info: avmm_bridge_512_0: Parametrization is valid.

 

Info: avmm_bridge_512_0: Auto-generation of QSYS example design in progress based on variant parameter settings

 

Info: avmm_bridge_512_0: Pin assignments are not included in pcie_ed.qsf

 

as no development kit is specified.

 

Info: avmm_bridge_512_0: save_system C:/Users/Admin/AppData/Local/Temp/alt8353_40724721456274277.dir/0002_avmm_bridge_512_0_gen/pcie_ed.qsys

 

Info: avmm_bridge_512_0: Generating QSYS system pcie_ed.qsys

 

Info: avmm_bridge_512_0: Running: qsys-script --pro --script=pcie_ed.tcl

 

Error: avmm_bridge_512_0: Unable to create pcie_ed.qsys, read pcie_ed_tcl_log.txt for log

 

Info: avmm_bridge_512_0: Copied pcie_ed.tcl and pcie_ed_tcl_log.txt to the example design directory.

 

Error: Failed to generate example design example_design to: C:\Designes\TRUEVIEW\pcie_hard_ip\avmm_bridge_512_0_example_design

 

Opening the log file:

2020.03.31.17:24:14 Warning: Both --quartus-project and --new-quartus-project switches are not used. A new Quartus project named pcie_ed will be created using the tcl script filename: C:\Users\Admin\AppData\Local\Temp\alt8352_8205035805552475495.dir\0051_avmm_bridge_512_0_gen\pcie_ed...

 

2020.03.31.17:24:14 Info: Doing: qsys-script --pro --script=C:/Users/Admin/AppData/Local/Temp/alt8352_8205035805552475495.dir/0051_avmm_bridge_512_0_gen/pcie_ed.tcl

 

2020.03.31.17:24:28 Error: Failed to create Quartus Project, manually re-run the commands included in C:\Users\Admin\AppData\Local\Temp\alt8352_8205035805552475495.dir\0051_avmm_bridge_512_0_gen\quartus... in Quartus tcl shell.

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8 Replies
BoonT_Intel
Moderator
118 Views

Hi Sir,

What is the setting that you apply when generating the example design? I am using default setting (open a new IP GUI and generate the example design without change the setting), and I am able to generate the example design. See attached screenshot.194generate.png

Also, are you able to generate the same example design if you are using other quartus version?

AGaru1
Beginner
118 Views

Hi, thank you for your reply. I tried using default settings but i still get the error. We've got the licence for Quartus Pro. Maybe i can try using the 19.3 instead but i'm not sure if my leaders will agree on that.

 error.bmp

BoonT_Intel
Moderator
118 Views

Thanks. there are few experiment that I am suggesting.

  1. Generate the same IP using other version.
  2. With your current project with 19.4, try to generate other IP's example design (maybe external memory or any IP that you familiar).
  3. If you have other PC, try to install the same 19.4 quartus version again and generate the same example design.

With this, we might have some clue where the problem come from.

 

AGaru1
Beginner
118 Views

I made a new project on the same machine and the same quartus version and i tried to generate the Ethernet 100G low latency IP and i got an error, different one.err.bmp

BoonT_Intel
Moderator
118 Views

I guess the Quartus installation is corrupted. Maybe can try to re-install the quartus. When running installation, try to run the installation package as administrator.

AGaru1
Beginner
118 Views

Yes it seems like it was corrupted. I downloaded Quartus 19.4 on my desktop PC and using the trial period on that one since the licence can be only used on the workstation at the workplace.

It generated the design example succesfully.

Thank you for your help.

AGaru1
Beginner
118 Views

The testbench doesn't seem ready for simulation. The 100Gb Ethernet example design was ready for use. Maybe i'm doing somethinw wrong. I'm trying to run the msim_setup.tcl from the tcl console but i'm encountering errors ...

Error: couldn't read file "./..//common/modelsim_files.tcl": no such file or directory.

But the file is there!

BoonT_Intel
Moderator
118 Views

Great to know the design is generated successful now.

For the simulation issue, please make sure you are running it using a modelsim tools. Also, I will suggest you to create a new thread for this issue. Thanks!

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