This was all done on a Stratix IV Cyclone development board: DK-DEV-4SGX530N
I have followed all the documentation regarding offsets, switches for PFL, and making sure all the sof to flash parameters are correct for our hardware referencing flash programming pdfs.
There is no error when the memory is flashed from the command shell. Checksum checks out. After the SOF is flashed, I power cycle the board or press S1 on the board to load from flash and the error LED lights up that the PFL from flash failed.
If I assume the flash was programmed correctly (flash-programmer does not throw any errors), it would point to that the generated flash file is somehow wrong.
There are no issues when flashing an ELF file. There are no issues if I program the SOF into volatile memory. Only when i try to flash user hardware into the flash to be loaded via PFL.
I have the sof, elf, flash files generated attached for reference.
I have verified the rotary switch on the dev board and that is correctly set to 1 to load user hardware.
Elf command lines used for elf2flash and also programming the flash
elf2flash --input=cameracontrol.elf --output=cameracontrol_cfi_flash_0.flash --boot="c:\altera\11.1\nios2eds\components\altera_nios2\boot_loader_cfi.srec" --base=0x4000000 --end=0x8000000 --reset=0x6820000 --verbose
nios2-flash-programmer cameracontrol_cfi_flash_0.flash --base=0x4000000 --sidp=0x1000 --id=0x0 --device=1 --instance=0 --program --verbose
SOF command lines used for sof2flash and also programming the flash
sof2flash --input=ac6_ts_am1_530.sof --output=ac6_ts.flash --offset=0x00c20000 --pfl --optionbit=0x00018000 --programmingmode=PS
nios2-flash-programmer --base=0x04000000 ac6_ts_am1_530.flash
So an update, I got it to flash to the user hardware portion correctly. My mistake was that i am using the 530 version of the fpga while using files for the 230. So the memory mapping has changed and that is why the flash is programmed correctly and does not complain.