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Clock Video Input (CVI) usage in VIP IP Core suite

Altera_Forum
Honored Contributor II
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Hi All, 

 

I am a newbie to the Video and Image processing field. Pardon if my questions sound silly :) 

 

Let me elaborate a bit what we are trying to do: 

 

We are using Arria 10 SoC and Terasic HDMI-FMC card (http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=1067&PartNo=4) to take camera feed and store it in DDR4 memory. Terasic HDMI-FMC board has HDMI Receiver (ADV7619) that takes TMDS signal and outputs (H_SYNC, V_SYNC, DATA(R[15:0], G[15:0], B[15:0]), PCLK and DE (Data enable). With this configuration do I need to have CVI (Clock Video Input) block in the VIP IP Suite to extract the frame and store it in DDR4 memory. Currently, I am not planning to perform any processing on the video frames: My plan is to simply take the frame and store it in DDR4 memory. I have gone through the VIP IP Core user guide, but I still have some doubts. 

 

With that said I have below questions 

 

1. Is it a good idea to have CVI block and then use the output of CVI (Avalon-ST Video) to store the extracted frame into DDR4? 

 

2. Or else have my own logic to extract the frame? Based on H_SYNC, V_SYNC, DE etc.. 

 

Thank you. 

 

Regards, 

Hanumanth
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