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Compact Flash support for Nios II 5.0

Altera_Forum
Honored Contributor II
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The Nios II 5.0 development kit now includes a Compact Flash (True IDE mode) controller peripheral. This peripheral is backwards compatible with the Compact Flash interface previously posted to the Nios forum "Tested IP" area, offering Compact Flash support for example hardware and software (included in this post) as well as support for third-party file systems such as Micrium's uC/FS and eCOS (also available for download in the Download eCOS forum). 

 

To download supporting materials for this new Compact Flash support, download the following .zip file, extract to a computer with Quartus II 5.0 & Nios II 5.0 installed, and proceed to use the hardware and/or software examples of your choice to proceed. Additional information is available in the readme.txt document, included in the top-level of the .zip file 

 

warning: using any write command to the compactflash may damage the formatting, or file system current on the card. 

 

compact flash hardware & software examples for nios ii 5.0 (http://forum.niosforum.com/downloads/cflash/cf5_0.zip

 

Note: The above download does not include peripheral documentation describing the Compact Flash controller register map. This document will be published by Altera and available for download on the Altera website soon. In the interim, it is suggested that you download the original application note posted by Microtronix. Again, the register maps for both peripherals are identical. 

 

original compact flash peripheral application note (http://forum.niosforum.com/downloads/cflash/compactflash.pdf

 

What's new? 

- The register map of the Compact Flash peripheral is identical to the previous component. However, the power-on reset delay when a card is inserted has been modified to vary with the system clock speed selected in SOPC Builder to provide a constant 1ms of delay between Compact Flash card insertion and detection by the controller logic. 

- In addition to Verilog support in the previous component, VHDL designers will now have the Compact Flash controller HDL generated in VHDL by SOPC Builder 

- The "ideutils" example & debug software has been significantly improved (included with the .zip download above) to support hot-swapping of Compact Flash cards, an automated sector erase/write/read back test suitable for regression testing, and improved code comments/documentation. 

 

For additional details and known issues, please review the readme.txt file included with the above .zip download.
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