Cyclon IV active serial configuration failed

[DiegoHa]

I have a problem to configure a new custom FPGA Board.

We use a Cyclon IV (EP4CE22E22C8N) with an ISSI (IS25LP064A) Serial Flash Memory. (Similar to the Terasic DE0-Nano Board)

We use Quartus Prime Version 20.1.1

We program the serial configuration device with the serial flash loader according Fig.8-29 Cyclon IV Device Handbock.

·        VCCIO = 3.3V

·        MSEL 0 = Low

·        MSEL 1 = High

·        MSEL 2 = Low

Programming the FPGA over the JTAG interface works fine.

Generating the *.jic file and download with the serial flash loader seems to be ok.

Program/Configure, Verify and Blank-Check selected.

20us after AS programming (nCSO goes high) nStatus switch to low and reprogramming starts if the Auto-restart configuration after error is enabled.

If the Auto-restart configuration after error is disabled,  nConfig is high,  nStatus is low and INIT_DONE is low

Any idea would be helpful. 

Thanks in advance.

[YuanLi_S_Intel]

Hi,

What about MSEL3 status? Is it LOW as well?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyclone4-handbook.pdf (Page 173)

What about the CONF_DONE status?

Also, can you check the following?

• The nCE, nCONFIG, nSTATUS and CONF_DONE pins are connected according to the recommended setup in the device handbook. If pull-up/pull-down resistors are required, ensure the resistor values are correct.
• The power supplies are ramped up to the appropriate voltage level according to the device datasheet and are stable throughout the operation
• Which quartus version are you using? Can you try with other newer quartus version?

Thank You.

[DiegoHa]

Hi,

I use an EP4CE22E22 device in a E144 package which has no MSEL 3 Pin.

The CONF_DONE Pin is always low.

nCE is tied to GND
nConfig has 10k pullup to vccio (3V3)
nStatus has 10k pullup to vccio (3V3)
CONF_DONE has 10k pullup to vccio (3V3)

vccio = 3.29V   ripple +/-40mV
va = 2.49V   ripple +/-40mV
vccint/vccpll = 1.21V   ripple +/-30mV

all supplies are stable during programming

I use Quartus Prime 20.1.1 standard revision

[YuanLi_S_Intel]

Hi,

Cyclone IV E has MSEL[3]. Can you please check if the pin is connected appropriate?

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyclone4-handbook.pdf (Page 173)

Also, have you try to program with SOF? is it working fine?

Thank You.

[DiegoHa]

Hi

according Cyclon IV Handbook page 173
Smaller Cyclone IV E devices or package options (E144 and F256 packages) do not have the MSEL[3]pin.

Programming with the sof file works fine.

[YuanLi_S_Intel]

Hi Diego,

Can you try to program with other quartus version?

Just to make sure, when you are programming using quartus programmer, the configuration mode setting is "JTAG configuration scheme" and the programming is successful with 100% right?

Can you try to program by not selecting blank check and verify?

Regards,

Bruce

[DiegoHa]

Hi

 I have tried it with Quartus version 18.1.0 Build 625 and Quartus version 20.1.1 Build 720

In both versions JTAG configuration scheme is working fine. 100%(Successful)

[YuanLi_S_Intel]

Hi,

Can you try to read back the JIC file stored in flash memory and compare with the JIC file which you are programming into it?

Also, may i know how many board is having this issue?

Also, can you probe the configuration pin and see if there is any abnormality?

Thank You.

[YuanLi_S_Intel]

Do you have any update on this?

[DiegoHa]

Hi

The main problem was the *.jic file generation.

I have excepted that if I select a new configuration device, the default settings would work.

The Default Options/Boot info was set to Little endian instead of Big endian .

But I have still the problem than sometimes the configuration is not working.

Then i delete the db and the incremental_db folder in the project folder, recompile all and regenerate the jic file.

After that it works again.

I guess there is a problem during compilation or in the *.jic file generation.

Do you have an idea what the problem could be?

[YuanLi_S_Intel]

Hi,

Sorry i am confused with the following explanation. Can you please elaborate on it?

the main problem was the *.jic file generation.

I have excepted that if I select a new configuration device, the default settings would work.

The Default Options/Boot info was set to Little endian instead of Big endian .

But I have still the problem than sometimes the configuration is not working.

Then i delete the db and the incremental_db folder in the project folder, recompile all and regenerate the jic file.

After that it works again.

I guess there is a problem during compilation or in the *.jic file generation.

So you meant that the recompile JIC file is not working fine until you deleted the DB folder and incremental_DB folder in quartus project? This is weird.

Thank You.