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JB_ISDI
Beginner
98 Views

Cyclone 10 GX LVDS input voltage tolerance

What is the absolute maximum pin voltage, and differential voltage, for an LVDS input with 1.8V VCCIO?

Referring to the datasheet C10GX51002 2018.06.15, Table 13 says recommended max Vi = 2.19V, but is this the absolute maximum? Table 3 implies that an LVDS I/O pin can survive 2.50V for 50% of lifetime, but this is based on a pulse signal. Table 1 gives absolute maximum DC current for IO pin = +/- 25mA.

In my application, an external IC can drive up to 2.4V with max current 19mA, for about 1s, before LVDS levels are established. Will this destroy the LVDS input on the Cyclone 10?

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ShafiqY_Intel
Employee
86 Views

Hi JB_ISDI,

 

The LVDS I/O pins can tolerate a maximum of 10 mA per pin and a total of 100 mA per I/O bank.

The voltage level of the LVDS I/O pin must not exceed 1.89 V.

 

You may refer to following document for more details:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an692.pdf

 

Regards,

Matt

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