Hello Guys,
Can we apply operating for Cyclone 10 GX devices like ECO? I know that Cyclone 10 GX serial devices don't support ECO operation in Quartus Prime Pro. Does Intel provide any other methods for user to operate or modify or adjust properties?
As following image, I want to constrain one signal to be fed into ALUT thru specified port, for example DATAF port. If ECO supported, this can be implemented easily. However, I can't use ECO function for Cyclone 10 GX device. So I request whether Intel can provide other way or method for user to implement this kind of tasks.
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Hi sstrell,
1. I posted one thread for ECO issue of C10GX devices, https://community.intel.com/t5/Intel-Quartus-Prime-Software/Does-QPP-Quartus-Prime-Pro-hide-or-disable-engineering-change/m-p/1593364#M82725
I thought I have got the answer, C10GX doesn't support ECO any more, as follow image shows. The ECO function is disabled for C10GX devcies.
If you have oppsite answer, please let me know and prove it for me. I'll appreciate for this.
2. Why do i need to do this? I just want to use ECO funtion on C10GX deives. It's that simple.
Hi FvM,
Yeah, I want to ask question about ECOs. However, our target chip is Cyclone 10 GX. I alsways use ECOs function thru Chip Planner, which is feasible for me. So as my above image shown that Cyclone 10 GX serial can't support ECOs function any more. I got another information from QPS datasheet: Editing Mode in Chip Planner. The ECO editing mode for Cyclone 10 GX is closed.
According to your words, I went to check QPS datasheet, and found ECOs description about TCL script. But I also got one note message that:
Above "Note" message indicates that QPP only provide ECOs for Stratix 10 and Agilex 7 devices only.
So my question is does Cyclone 10 GX 100% not support ECOs function? Can't users use ECOs even thru TCL script channel?
I also give the "7.1. ECO Compliation Flow" section's detail as following image:
Then I went to my project, and didn't find the item "Perform ECO Compilation" from Start menu as above image. Which shows as following image, this proves again that Cyclone 10 GX doesn't support ECO fucntion.
BTW, my purpose to use ECOs, just as you said, to change LUT connections. We only want to edit several specitial LUTs connection. They are the most important nodes in our design. We want to keep them uniform. That's why we try to edit or change those LUTs connections. You know, the LUTs connections can vary in different compliation. You can't keep them uniform just with different compilations. Only ECOs can approach this object.
Hello Richard,
Sorry to post my delayed response here now.
Yes, I was preparing my simple project these days. I just wanted to think how to create one simple project to explain what I am just asking.
The attached archived project is this created project, please help check it. Which was created based on our current ADC processing project. Please ignore other parts. My question only focuses on 3 nodes or LE cells, which are coded as following
LaunchCT <= operation_mode_sel_sig;
Ch0Hit <= trig(0) when LaunchCT='1' else calibHit;
Ch1Hit <= trig(1) when LaunchCT='1' else calibHit;
Ch2Hit <= start when LaunchCT='1' else calibHit;
u0_carry: carryin_test port map (carryin => Ch0Hit,carryout => cout0);
u1_carry: carryin_test port map (carryin => Ch1Hit,carryout => cout1);
u2_carry: carryin_test port map (carryin => Ch2Hit,carryout => cout2);
There are 3 I/O pins come from outside and they are fed into same logic module which is named as "carryin_test". Which is implemented as following image, so only two ALUTs are used to realize this module.
I have added physical location constrains for these 3 carryin cells and make them closed to those 3 I/O pins.
Above image shows the constrain format, however, only the third can be applied. The first two constains will push Quartus giving errors imformation:
Could you give me the expalnation about above error?
I resolved above error to constrain the first two cells as the third cell. It just corrects "N24" to N0. After that, I still get the following warning:
Could you give me the explanation about above waring info? What's the mean of "will be dropped"?
All above comments are just about this simple project creatation. Now let's go back into my primary question about the inside connections of the cell/node. The following image shows the inside of the cell (ALUT). This is very simple, there is only one input signal is fed into this ALUT. It is connected to DATAC of the ALUT. My question is, if ECO is not allowed to use for Cyclone 10GX, is there any other ways to control the input signal to connect to the ALUT input ports? You know I have total 3 I/O input signals, I want to control them to connect the same ALUT input ports, for examle, all connct to DATAC, instead of one connects DATAA, one connects DATAB, and the last one connects DATAC. Which are uncertainty connection. What i need is fixed connection, then i can get almost same time delay for these paths.
