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Hi!
I'm working on a custom PCB, which hosts three Cyclone 10 LP devices, arranged in accordance with the image below (from the Intel® Cyclone® 10 LP Core Fabric
and General Purpose I/Os Handbook) and I am attempting to configure the devices using the active serial topology.
The master is setup to use active serial (MSEL 010) and the slaves are setup to use passive serial (MSEL 000)
On the Quartus side of things, the serial configuration device is programmed using a .jic file, which consists of two .sof pages with the firmwares for the master and slave.
When only the master device is connected, the active serial configuration works as expected, reading the firmware from the serial configuration device after POR.
When any of the slave devices are connected, the configuration fails for the master as well as the slaves.
Am I correct in understanding that if the connections are correct and the EPCQ device is programmed with two .sof files, then the configuration should just work when the devices are powered up? Are there any additional steps that should be taken when creating the .sof files for the slave devices, for example?
Thank you in advance.
Aadu
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Hi there,
Your understanding has no problem. There are some points you need to care:
- Is the Configuration Voltage Standard 3.3V? I see the MSEL is 010.
- Is there a buffer added to your data path? Otherwise, the master's clk and data are not enough to drive the slave.
If the above conditions are met, you can further use the oscilloscope to capture the waveforms of DATA and Clk and ensure that the parameters of the waveforms meet the requirements in the datasheet.
Best regards,
WZ
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Hi there,
I wanted to check if you have any further questions or concerns. If not, I will go ahead and mark this issue as resolved.
Additionally, we would greatly appreciate it if you could take a moment to fill out our survey. Your feedback is valuable to us and helps us improve our support quality.
Thank you for your time and cooperation.
Best regards,
WZ

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