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Cyclone 10GX dev kit PCIe simple PIO example using Linux host

zener
New Contributor I
220 Views

I'm looking for a minimal PCIe reference design for the Cyclone 10GX dev kit which is using simple PIO to access a buffer or similar within the FPGAf fabric including Linux software. Another option would be the full blown DMA reference design including a Linux (5.15.x compatible would be great!) device driver.

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7 Replies
wchiah
Employee
197 Views

Hi ,


For Intel Cyclone 10 design example, you can get it in Quartus through IP catalog.

Additional Design example, you may refer to Intel FPGA design store.

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/desig...


let me know if you still dont get what you want.

Regards,

Wincent_Intel


zener
New Contributor I
189 Views

Thank you, but most of the example designs contain Windows software/drivers. Are there any sample designs which provides a device driver for Linux? Or just some simple PIO example using devmem/mmap to access some registers or memory within the FPGA fabric?

wchiah
Employee
182 Views

Hi,


I apologize that I am not so familiar with devmem/mmap system.

But for that I do find some related do it, not sure if this is helpful to you or not


Regards,

Wincent_Intel





zener
New Contributor I
177 Views

Thank you Wincent, but I the problem is not how to use devmem/mmap in software. What I asked for is a simpler PCIe reference design which only has a register block or small RAM/FIFO I can access using devmem/mmap. All the other reference designs are using DMA which require a device driver to set up descriptors etc. The problem is that the device drivers I've found so far are only available for Windows.

So either
1) A simple PCIe reference design containing a memory region in the FPGA fabric which I can access using mmap on Linux.
2) Source for a Linux device driver (presumably for kernel 5.15.x) for the current PCIe DMA reference designs.

wchiah
Employee
172 Views

Hi,


As any reachable resource, I don't find any related design example as per mention.

Please accept my apology if any inconvenience caused to you.


If you believe your business case justifies that Intel PSG should invest in providing PCIe reference design containing a memory region in the FPGA fabric which can access using mmap on Linux for C10.


My best suggestion for you at the moment will be please work directly with your cognizant Intel Sales/FAE to submit this feature request.


Regards,

Wincent_Intel


zener
New Contributor I
152 Views

Thank you for your feedback Wincent. In that case I'll make a design of my own even though that will require some more simulation and debugging than having a known working starting point.

wchiah
Employee
128 Views

Hi,


Thanks for your understanding.

Is there anything else you think I can still help you ?


Else I would like to have your permission to close this case.

If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or please let me know the cause so that I may improve your future support experience.

 

Regards,

Wincent_Intel



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