Cyclone 10LP Bitstream Encryption

[Matt_P]

Hello Community,
I hope this note finds you well. 
The following page leads Me to believe bitstream encryption is supported in some capacity for Cyclone 10LP. Can you please help Me confirm and if true, find the process for doing so?

https://www.intel.com/content/www/us/en/support/programmable/support-resources/configuration/cfg-feature.html

Best Regards,

[FvM]

The linked documents seems to be misleading. There's no encryption feature with Cyclone 10 LP.

[Matt_P]

Thanks for the comment, FvM, this matches my efforts in sifting through Quartus as well.
I'm curious to understand what exactly the document is referring to with respect to design security - if you have any further comments or thoughts, I'd be happy to hear.
Otherwise, I'm digging further through the documentation.

[FvM]

Hi,
only Cyclone series FPGA with design security features are Cyclone V and Cyclone 10 GX. Browsing Cyclone 10 LP handbook clarifies that the table entry is erroneous.

[Farabi]

Frank is right C10LP dont support design encryption feature. I will update the document.

regards,

Farabi

[Matt_P]

Thank you all for chiming in
Best Regards,