Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20689 Discussions

Cyclone IV IBIS Model

Altera_Forum
Honored Contributor II
‎12-05-2017 08:12 AM
1,347 Views

Hi, 

i'm performing a board simulation that use a Cyclone IV FBGA-484. I need to simulate an address line (50 ohm impedance trace) from FPGA (pin A9 - IO/DIFFIO_T24n) to an SRAM. The VCCIO is 3.3V for the bank. The net is in the Bank 8 (top bank) so according to IBIS model user guide i need to select a model with <I/O> field that start with "c". What is the best model to use to simulate this net? Do i need a model with the 50ohm OCT? 

 

Thanks
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎12-06-2017 02:54 AM
278 Views

Hi  

 

Yes you need to model with OCT.  

You can download the package model specific to the device from website or generate the PIN based model using quartus tool. 

Check the linkhttps://www.youtube.com/watch?v=izcvszgu2ws 

https://www.youtube.com/watch?v=46kj1yr2-z4 

For simulation the link 

https://www.altera.com/support/support-resources/download/board-layout-test/ibis/ibs-about_ibis.html 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.