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Altera_Forum
Honored Contributor I
1,125 Views

Cyclone IV IBIS Model

Hi, 

i'm performing a board simulation that use a Cyclone IV FBGA-484. I need to simulate an address line (50 ohm impedance trace) from FPGA (pin A9 - IO/DIFFIO_T24n) to an SRAM. The VCCIO is 3.3V for the bank. The net is in the Bank 8 (top bank) so according to IBIS model user guide i need to select a model with <I/O> field that start with "c". What is the best model to use to simulate this net? Do i need a model with the 50ohm OCT? 

 

Thanks
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Altera_Forum
Honored Contributor I
56 Views

Hi  

 

Yes you need to model with OCT.  

You can download the package model specific to the device from website or generate the PIN based model using quartus tool. 

Check the linkhttps://www.youtube.com/watch?v=izcvszgu2ws 

https://www.youtube.com/watch?v=46kj1yr2-z4 

For simulation the link 

https://www.altera.com/support/support-resources/download/board-layout-test/ibis/ibs-about_ibis.html 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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