07-02-2018 08:20 AM
Hi,im using cyclone IV now, and i want to change one of the PLLs output frequence from 3MHz to 99MHz by step 3MHz when FPGA works. I use ALTPLL_RECONFIG IP core, and want to set parameter manually. but how can i get the right parameter? now im just use ALTPLL and create each mif file with different frequence and get the value. that is too complex, and kind of stupid. is there any Reference Manual or user guide tell us how to set the parameter? like how to set Loop-Filter-Capacitance/Resistance and Charge-Pump-Current value. Thanks, Leon ZHAO
07-02-2018 10:25 AM
Hi,Few years ago I have filled service request for Altera support asking about those parameters. They answered that they can not share formulas used to calculate PLL bandwidth and loop filter settings, and suggested to use PLL reconfiguration calculator spreadsheet (currently I can not find it). For other parameters see: https://www.altera.com/support/support-resources/operation-and-testing/pll-and-clock-management/pll-...
07-02-2018 02:04 PM
Hi,Thanks for your reply, after reading the link, i know how to calculate the right value of N counter, M counter and C counter. But the biggest problem is to set Loop-Filter-Capacitance/Resistance and Charge-Pump-Current value. It seems that altera doesn't want to share the details.