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Cyclone V Configuration Devices

Altera_Forum
Honored Contributor II
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I've got a Terasic Cyclone V GX development board. I removed the EPCQ256 configuration device and am testing two other alternatives (Macronix MX25L257 and Cypress S25FL128). I created a simple project with some LEDs and am using JTAG indirect programming to program the devices (jic file). 

 

In both cases Quartus will program the devices and verify without error, but in neither case will the FPGA configure properly at power up (active serial).  

 

nCONFIG = 3.3V 

CONFIG_DONE = 0V 

nSTATUS = 2V (?) 

 

Any thoughts?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

It's not clear why we needed 17.1. Perhaps it generates a slightly different programming file. I'll ask him.  

 

--- Quote End ---  

 

 

I notice 17.1 has an ECPQ128 and an ECPQ128A option. I don't recall if 17.0 and earlier had the "A" version, but maybe that's what is different.
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Altera_Forum
Honored Contributor II
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Apparently 17.1 is the first version supporting the new EPCQA family. The Winbond 128 and 256 Mbit devices seem to be compatible with respective EPCQA chips. It might be that they are also recognized as EPCQ but I didn't yet check.

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Altera_Forum
Honored Contributor II
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Confirmed, Winbond W25Q128JV works as a EPCQ128A when using Quartus 17.1.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Confirmed, Winbond W25Q128JV works as a EPCQ128A when using Quartus 17.1. 

--- Quote End ---  

 

 

ilkkak,  

 

That's a relief to hear. Just to be sure I understand, your board boots now? We're making a board with the exact same Winbond chip (W25Q128JV except smaller WSON 6x5 mm package) in Active Serial x1 mode and it would be nice to know if it will work. We were going to have to switch to a different FPGA vendor if we could not find a FLASH solution.
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Altera_Forum
Honored Contributor II
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If this really works, as corestar imagines, I'm thrilled as well.

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Altera_Forum
Honored Contributor II
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Yes, with the W25Q128JV it boots and works fine in all respects as far as I can tell with a day's testing. I'm using ASx1 too.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Yes, with the W25Q128JV it boots and works fine in all respects as far as I can tell with a day's testing. I'm using ASx1 too. 

--- Quote End ---  

 

 

Thanks for the info. One less thing to worry about.  

 

Hopefully, Intel will simplify this in the future, but this works for now. Seems like their own 3D XPoint memory would be an ideal solution to replace their SRAM based FPGA with something that combines the best of FLASH and SRAM based chips. I'm not knowledgeable enough to know for sure of course, but it seems like it is denser, cheaper and lower power than SRAM and would eliminate the need for external FLASH altogether.
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Altera_Forum
Honored Contributor II
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ilkkak, 

 

We got our board with the W25Q128JV and I'm having trouble. Could you provide more details on how you got it working? I'm trying to follow AP370 but it is not very clear. We set MSEL to 10011 and the schematic is as per Fig 7-9 in the Cyclone V datasheet for "Single device As x1 Mode Configuration". CLKUSR is not connected. 

 

I created a JIC file as per AN370, but after a while the config fails with an error that it can't recognize the silicon ID. Note, I can program the FPGA itself fine with the sof used to create the jic.  

 

Do I have to create the Serial Flash Loader core in the design? AN370 seems to imply it will use a factory default.  

 

https://alteraforum.com/forum/attachment.php?attachmentid=14755&stc=1  

https://alteraforum.com/forum/attachment.php?attachmentid=14756&stc=1  

https://alteraforum.com/forum/attachment.php?attachmentid=14757&stc=1
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Altera_Forum
Honored Contributor II
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Hi corestar, 

I have MSEL at 10010, but 10011 should be fine for ASx1, it's the same configuration but with a longer POR delay. CLKUSR is not connected. I don't think you need a Serial Flash Loader core if you don't specifically want to make your own flash loader. In Conversion Setup I have the start address of SOF data set to 0x0, and "Disable EPCS/EPCQ ID check" is enabled in the Advanced Options. Otherwise the conversion setup is the same as yours.
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Altera_Forum
Honored Contributor II
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ilkkak,  

 

Seems like we should be ok. I'm using the WSON 6x5 package, but surely that does not matter. As I understand the download process (my second image above), it downloads the Serial Flash Loader to the FPGA and then uses that as bridge to download the bits to the FLASH. So I should not need to instantiate SFL as implied in AN370.
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Altera_Forum
Honored Contributor II
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Hi 

 

when programming a Winbond W25Q64 as an EPCQA replacement I do get the same error message even though "Disable EPCS/EPCQ ID check" is enabled. 

Any clues? 

 

When I load a sof and then write the rpd file manually to a new W25Q64 I can verify that the content is correct but booting the FPGA fails. I do remember that with the EPCQ devices the programmer writes 12 dummy read cycles to the NV area of an EPCQ for an sucessful boot. 

Is something similar required for an EPCQA?
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Altera_Forum
Honored Contributor II
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ilkkak,  

 

I think we did something very stupid and maybe you can confirm. We got the W25Q128JVPim parts (with emphasis on the IM) which apparently defaults to standard serial. I think maybe we should have gotten the W25Q128Piq parts which defaults to Quad SPI.  

 

Does your board use all four data lines (AS_DATA0 to AS_DATA3) as in Fig 7-13 of the Cyclone V datasheet?  

 

Thanks for your help. This is all very confusing. 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=14774
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Altera_Forum
Honored Contributor II
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corestar, 

Mine is W25Q128JVSIQ (top marking W25Q128JVSQ), W25Q128JVPIQ is the same one in WSON-8 package. https://www.winbond.com/resource-files/w25q128jv%20spi%20revc%2011162016.pdf 

W25Q128JVPIM is a different chip, at least in the way it that returns device id 7018h. W25Q128JVSIQ returns 4018h. I have all the four lines connected, but as I'm using ASx1 I think it's actually using just a single one for the programming. 

I'm not sure if "Disable EPCS/EPCQ ID check" does anything, at least anymore. The flash JEDEC ID bytes have to be 0xEF174018, otherwise Quartus just refuses to write the flash.
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Altera_Forum
Honored Contributor II
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ilkkak, 

 

I really appreciate you confirming that. We're going to have to modify our board a bit. 

 

As near as I can tell, absolutely everyone (me, you, our FAE and the rest of planet earth) is confused about the Altera programming :-). I think we're all confusing two issues: 1) configuring the FPGA during boot (ie FPGA reads FLASH) and 2) programming the FLASH itself. The ASx1 vs ASx4 settings seem to refer to the former and have nothing to do with the latter. I'm pretty sure the ASx1 mode for an EPCQ device would only be useful to someone that programmed it prior to putting it on the board. To actually program the FLASH itself, we should follow Figure 7-13 "Connection Setup for Programming the EPCQ Using the JTAG Interface" which is sounds like you did.  

 

If my understanding is correct, you should be able to use ASx4 configuration and boot a bit faster.  

 

I'll be able to confirm after we modify our board. Thank you Altera for making something that should be routine into a nightmare.
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Altera_Forum
Honored Contributor II
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I agree, it is all very confusing. It is at least partly due to the several different ways you can configure the FPGA and program the flash. 

I'm working with a legacy design and honestly don't know too much about the hardware connections. "Active Serial" refers to the interface and you can use it to program the EPCQ device (this is what you do with a USB Blaster or similar): https://www.altera.com/documentation/sam1403481100977.html#sam1403478854451 

 

I think it could be the other way around: booting the FPGA from the flash is always the same (using all four data lines if it's an EPCQ flash) and it does not matter if you used ASx1, ASx4 or JTAG to get your data to the flash. My guess is mostly based on Altera stating that "The AS x4 scheme is supported only in Stratix® V devices": https://www.altera.com/support/support-resources/support-centers/devices/cfg-index/cfg-as.html
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Altera_Forum
Honored Contributor II
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We also use the S25FL128S in our design 1x speed works fine, now we would like to use quad speed. Somebody already has the correct content of the quartus.ini file? 

 

Did some little reverse engineering: known keys for quartus.ini are PGMIO_SWAP_HEX_BYTE_DATA and PGMIO_IGNORE_EPCS_ID_CHECK.  

A grep for these values in the quartus install directory revealed the C:\intelFPGA\17.1\quartus\bin64\pdbmin directory.  

This directory contains pdb (https://en.wikipedia.org/wiki/program_database) files, mainly used for debugging quartus during development.  

These can be processed to more readable text file by https://github.com/microsoft/microsoft-pdb/blob/master/cvdump/cvdump.exe  

 

By placing cvdump.exe in this directory and adding the following code in a batch script in this directory, and executing this allows conversion of all files. 

 

for %%f in (*.pdb) do ( 

echo %%~nf 

cvdump %%~nf.pdb >%%~nf.txt 

 

Hereafter a grep can be done in the generated *.txt files for the correct string. But this is like searching a needle in a haystack when you haven't got a clue what a needle looks like;) 

 

Did find the PGMIO_ASx1_DUMMY_CLK and PGMIO_ASx4_DUMMY_CLK settings but not the setting to enable QSPI128 selection any help? 

 

 

 

 

 

--- Quote Start ---  

Have you looked at Cypress App Note AN200498. It says you have to tell it to ignore the Device ID of the FLASH.  

 

We're hoping to use the Cypress chip you mention, so I hope it works. The App Note is very vague on some issues and says to contact Altera for some things like a quartus.ini file. That seemed odd. But we contacted Altera and they have no interest in helping use a competitor FLASH.  

 

I second your comments on the Altera FLASH. Even ignoring the ridiculous price, the size ruled it out in our case. And apparently they are replacing them all with footprint compatible new chips. 

--- Quote End ---  

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Altera_Forum
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I can confirm the Winbond W25Q128JVPIQ works fine. I gave up on Cypress. We're using the WSON 6x5 package that is a fraction of the size and cost of the Altera FLASH. Some details: 

 

1) You need Quartus 17.1  

2) You must use the IQ version of the Winbond, the IM version will not work. The IQ version defaults to Quad SPI mode.  

3) The board layout and schematics are shown in the attached images. We set MSEL to "10011".  

4) No changes to the quartus.ini are needed.  

5) It acts exactly as a EPCQ128A.  

6) The "Altera ASMI Parallel" IP works great to treat the parts of the FLASH not used for configuration as user FLASH.  

7) You do NOT need to instantiate the serial flash loader in your design. It is automatically loaded by the programmer.  

 

From Cyclone V Datasheet: 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=15081  

 

Set "Settings -> Device/Boars ... -> Device and Pin Options ..." 

 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=15082  

 

Via File -> Convert Programming Files ... 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=15083  

 

After loading the .jic fine in the programmer: 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=15084
Altera_Forum
Honored Contributor II
1,926 Views

Does anyone know if the Winbond W25Q128JVPIQ can be used in place of a S25FL064 device. I used to use the S25FL064 as a EPCS equivalent and need to build an older board design. It is a similar enough footprint but it wired for 1x SPI instead of Quad.

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Does anyone know if the Winbond W25Q128JVPIQ can be used in place of a S25FL064 device. I used to use the S25FL064 as a EPCS equivalent and need to build an older board design. It is a similar enough footprint but it wired for 1x SPI instead of Quad. 

--- Quote End ---  

 

 

It does not work as an EPCS replacement. We made the mistake of assuming it could and had to do a board iteration as per my reply# 38 above.
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IDeyn
New Contributor III
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Hi all!

 

We have the same problem.

We have our custom Cyclone V Board with a W25Q128JVPIQ (Winbond) flash drive.

FPGA configuration from the flash drive did not work successfully until we had soldered into the DCLK gap 50 oHm resistor.

When we cooled the flash drive, the configuration also did not occur. With 27 oHm configuration occurred only on hot (only temperatures close to room temeperature and higher).

We also tried changing the DCLK frequency in "Device and Pin Options > Configuration > Active serial clock source" from 100 MHz to 12.5 MHz. We have the same situation as the colleagues above,

the frequency of 12.5 MHz during configuration changes to 100MHz (see attached picture), that is, we conclude that this setting is ignored.

 

osc.png

 

It is worth noting that we succeeded only with mode ASx1. ASx4 still does not work.

Maybe there is any new information about that issue or related with it?

 

Best regards,

Ivan

 

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