Cyclone V FPGA PLL not locking

[Vysakh]

Hi ,

We are using Cyclone V (5CEBA9F23C7) FPGAs In our custom boards .We are using the built in PLL ip for generating clocks required for applications .

In one such board the FPGA PLL is not locking ('locked' signal in PLL ip is low). Inputs to the PLL (clock and reset) are found to be good .

Same image works in other boards we're not observing PLL issue .

What are the ways to debug this issue further ?

[AqidAyman_Intel]

Hi,

Have you check the VCCA_FPLL for that particular board if they are supplying stable power? This could be the reason for the PLL not locking.

Regards,

Aqid

[AqidAyman_Intel]

Hi,

Do you need more support on this issue?

Regards,

Aqid

[AqidAyman_Intel]

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