Cyclone V: How can i set the debug authentication signals DBGEN and SPIDEN etc.?

[tibor1]

Hello,

I am using a Cyclone V SoC with Cortex-A9 MPCore.

The ARM Architecture TRM and Cortex-A9 TRM say that an external security controller drives the debug authentication signals, such as DBGEN and SPIDEN.

I found no information whatsoever on how to drive these signals.
Are these even publicly documented? How can I access and set these debug authentication signals?

Kind regards

[EBERLAZARE_I_Intel]

Hi,

Let me check with our internal team regarding the authentication status register mentioned.

Thanks.

[EBERLAZARE_I_Intel]

Hi,

These registers and signals in CortexA9 core.
Usually we refer user to the ARM documentation.

https://developer.arm.com/documentation/ddi0407/i/signal-descriptions/external-debug-interface/authentication-interface