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Cyclone V Kernel Panic after SDRAM EDAC enable

I have enabled EDAC support for my Cyclone V custom board in the kernel .config (kernel v. 4.14.54)

CONFIG_EDAC=y # CONFIG_EDAC_LEGACY_SYSFS is not set CONFIG_EDAC_DEBUG=y CONFIG_EDAC_ALTERA=y CONFIG_EDAC_ALTERA_SDRAM=y CONFIG_EDAC_ALTERA_L2C=y CONFIG_EDAC_ALTERA_OCRAM=y CONFIG_EDAC_ALTERA_ETHERNET=y CONFIG_EDAC_ALTERA_NAND=y CONFIG_EDAC_ALTERA_DMA=y CONFIG_EDAC_ALTERA_USB=y CONFIG_EDAC_ALTERA_QSPI=y CONFIG_EDAC_ALTERA_SDMMC=y

 

After, I did extend my .DTS als following (Although I do not need to that because in "socfpga.dtsi" there is already a similar line. Even without declaring this node explicitly, the same error happens)

sdramedac { compatible = "altr,sdram-edac"; altr,sdr-syscon = <&sdr>; interrupts = <0 39 4>; };

 

If I reboot my System now, I get a Kernel panic every time!

 

EDAC MC0: Giving out device to module altera_edac controller soc:sdramedac: DEV soc:sdramedac (INTERRUPT)   sdhci: Secure Digital Host Controller Interface driver   sdhci: Copyright(c) Pierre Ossman   Synopsys Designware Multimedia Card Interface Driver   dw_mmc ff704000.dwmmc0: 'num-slots' was deprecated.   dw_mmc ff704000.dwmmc0: IDMAC supports 32-bit address mode.   Kernel panic - not syncing:   EDAC: [12 Uncorrectable errors @ 0x07AF25EC]     CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.54 #1   Hardware name: Altera SOCFPGA   [<801131c0>] (unwind_backtrace) from [<8010d5f8>] (show_stack+0x20/0x24)   [<8010d5f8>] (show_stack) from [<8066a23c>] (dump_stack+0x80/0x94)   [<8066a23c>] (dump_stack) from [<801237a0>] (panic+0xec/0x258)   [<801237a0>] (panic) from [<804f89d8>] (altr_sdram_mc_err_handler+0x128/0x138)   [<804f89d8>] (altr_sdram_mc_err_handler) from [<8016f488>] (__handle_irq_event_percpu+0x84/0x2b4)   [<8016f488>] (__handle_irq_event_percpu) from [<8016f6e4>] (handle_irq_event_percpu+0x2c/0x68)   [<8016f6e4>] (handle_irq_event_percpu) from [<8016f768>] (handle_irq_event+0x48/0x6c)   [<8016f768>] (handle_irq_event) from [<80173384>] (handle_fasteoi_irq+0xc8/0x17c)   [<80173384>] (handle_fasteoi_irq) from [<8016e580>] (generic_handle_irq+0x34/0x44)   [<8016e580>] (generic_handle_irq) from [<8016eb94>] (__handle_domain_irq+0x8c/0xfc)   [<8016eb94>] (__handle_domain_irq) from [<80101548>] (gic_handle_irq+0x5c/0xa0)   [<80101548>] (gic_handle_irq) from [<8010e34c>] (__irq_svc+0x6c/0xa8)   Exception stack(0xbe8ddb60 to 0xbe8ddba8)   db60: bd792000 00000000 bd792040 00004448 80975f30 be801e40 60000013 014000c0   db80: 8042b060 be8ddbd8 00004446 be8ddbd4 00000000 be8ddbb0 803b634c 802540e4   dba0: 60000013 ffffffff   [<8010e34c>] (__irq_svc) from [<802540e4>] (__slab_alloc.constprop.9+0x54/0x58)   [<802540e4>] (__slab_alloc.constprop.9) from [<802541e8>] (__kmalloc+0x100/0x280)   [<802541e8>] (__kmalloc) from [<8042b060>] (dma_common_contiguous_remap+0x48/0xc8)   [<8042b060>] (dma_common_contiguous_remap) from [<80119244>] (__alloc_remap_buffer+0x70/0xa8)   [<80119244>] (__alloc_remap_buffer) from [<801192b4>] (remap_allocator_alloc+0x38/0x40)   [<801192b4>] (remap_allocator_alloc) from [<801187c4>] (__dma_alloc+0x17c/0x304)   [<801187c4>] (__dma_alloc) from [<801189e8>] (arm_dma_alloc+0x50/0x58)   [<801189e8>] (arm_dma_alloc) from [<8042aa6c>] (dmam_alloc_coherent+0x9c/0x104)   [<8042aa6c>] (dmam_alloc_coherent) from [<80517e8c>] (dw_mci_probe+0x4ec/0xc5c)   [<80517e8c>] (dw_mci_probe) from [<80519990>] (dw_mci_pltfm_register+0xac/0xb8)   [<80519990>] (dw_mci_pltfm_register) from [<805199fc>] (dw_mci_pltfm_probe+0x3c/0x40)   [<805199fc>] (dw_mci_pltfm_probe) from [<80418e34>] (platform_drv_probe+0x60/0xc0)   [<80418e34>] (platform_drv_probe) from [<80416d80>] (driver_probe_device+0x258/0x2dc)   [<80416d80>] (driver_probe_device) from [<80416ecc>] (__driver_attach+0xc8/0xcc)   [<80416ecc>] (__driver_attach) from [<80414ee8>] (bus_for_each_dev+0x78/0xac)   [<80414ee8>] (bus_for_each_dev) from [<80416680>] (driver_attach+0x2c/0x30)   [<80416680>] (driver_attach) from [<804160bc>] (bus_add_driver+0x114/0x220)   [<804160bc>] (bus_add_driver) from [<80417c28>] (driver_register+0x88/0x104)   [<80417c28>] (driver_register) from [<80418d80>] (__platform_driver_register+0x50/0x58)   [<80418d80>] (__platform_driver_register) from [<80934724>] (dw_mci_pltfm_driver_init+0x24/0x28)   [<80934724>] (dw_mci_pltfm_driver_init) from [<80101c5c>] (do_one_initcall+0x54/0x178)   [<80101c5c>] (do_one_initcall) from [<80900fe4>] (kernel_init_freeable+0x1d0/0x260)   [<80900fe4>] (kernel_init_freeable) from [<8067f1a8>] (kernel_init+0x18/0x120)   [<8067f1a8>] (kernel_init) from [<80108408>] (ret_from_fork+0x14/0x2c)   CPU1: stopping   CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.14.54 #1   Hardware name: Altera SOCFPGA   [<801131c0>] (unwind_backtrace) from [<8010d5f8>] (show_stack+0x20/0x24)   [<8010d5f8>] (show_stack) from [<8066a23c>] (dump_stack+0x80/0x94)   [<8066a23c>] (dump_stack) from [<80110598>] (handle_IPI+0x378/0x3e8)   [<80110598>] (handle_IPI) from [<80101588>] (gic_handle_irq+0x9c/0xa0)   [<80101588>] (gic_handle_irq) from [<8010e34c>] (__irq_svc+0x6c/0xa8)   Exception stack(0xbe905f38 to 0xbe905f80)   5f20: 00000001 807b5218   5f40: 3f66a000 8011c720 be904000 80a03d34 80a03ce8 80a5c217 807b8760 413fc090   5f60: 00000000 be905f94 be905f98 be905f88 801095b4 801095b8 60070013 ffffffff   [<8010e34c>] (__irq_svc) from [<801095b8>] (arch_cpu_idle+0x48/0x4c)   [<801095b8>] (arch_cpu_idle) from [<80684b3c>] (default_idle_call+0x30/0x3c)   [<80684b3c>] (default_idle_call) from [<80161830>] (do_idle+0xd4/0x144)   [<80161830>] (do_idle) from [<80161b7c>] (cpu_startup_entry+0x28/0x2c)   [<80161b7c>] (cpu_startup_entry) from [<8010ffb4>] (secondary_start_kernel+0x164/0x16c)   [<8010ffb4>] (secondary_start_kernel) from [<001019ec>] (0x1019ec)   ---[ end Kernel panic - not syncing:   EDAC: [12 Uncorrectable errors @ 0x07AF25EC]

 In the preloader the ECC gets enabled succesfully:

U-Boot SPL 2013.01.01 (May 13 2019 - 09:02:26) BOARD : Altera SOCFPGA Cyclone V Board CLOCK: EOSC1 clock 50000 KHz CLOCK: EOSC2 clock 50000 KHz CLOCK: F2S_SDR_REF clock 0 KHz CLOCK: F2S_PER_REF clock 0 KHz CLOCK: MPU clock 800 MHz CLOCK: DDR clock 400 MHz CLOCK: UART clock 100000 KHz CLOCK: MMC clock 50000 KHz CLOCK: QSPI clock 3125 KHz RESET: COLD INFO : Watchdog enabled SDRAM: Initializing MMR registers SDRAM: Calibrating PHY SEQ.C: Preparing to start memory calibration SEQ.C: CALIBRATION PASSED SDRAM: 1024 MiB SDRAM: ECC Enabled ALTERA DWMMC: 0

What am I missing?

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2 Replies
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Employee
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Hello,

Is this a custom board or development kit?

If you keep EDAC disabled, are you able to boot the linux?

 

Thanks

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Highlighted
Employee
22 Views

Hello,

I would like to know if the issue still persisting.

 

Thank you

 

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