Cyclone V SE Signaltap pin placement

[AJien]

Hi all,

I've been trying to add a Signal Tap instance to my design on a Cyclone V SE (5CSEMA4U23C6) using Quartus Prime 18.0/18.1. I setup the Signal Tap using Tools -> Signal Tap Logic Analyzer and enabled it in Assignments -> Settings.

However the fitter says it couldn't fit the design with the following error messages:

Error (16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: Error (169057): Can't place I/O pin altera_reserved_tck at pin location AB5 -- I/O pin uses weak pullup, which is not supported by this pin location (1 location affected) Info (175029): PIN_AB5 Error (175019): Illegal constraint of I/O pad to the location PIN_Y9 Info (14596): Information about the failing component(s): Info (175028): The I/O pad name(s): altera_reserved_tdo Error (16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: Error (169057): Can't place I/O pin altera_reserved_tdo at pin location Y9 -- I/O pin uses weak pullup, which is not supported by this pin location (1 location affected) Info (175029): PIN_Y9

If I disable the Signal Tap instance, the design compiles fine without the above errors. I've tried poking around in the pin planner and assignment editor, but these two pins are reserved from editing.

Does anyone have any clue on what I can do to solve this problem?

[Rahul_S_Intel1]

Hi , From the error description what i found that you are been using the reserved pin for your usage. I am suggesting the below . 1. Include the signal tap 2.Put the pin assignment on auto See the design is working , if the above is working we can assume signal tap is not the reason for the error.

[AJien]

Hi,

The steps listed were exactly what I did. The pin assignments were picked by Quartus Prime (Lite edition, 18.0/18.1) automatically. All I did was include the Signal Tap and I did not set the pin assignments myself.

[sstrell]

Those are the JTAG pins. Are you using any other IP or anything that makes use of JTAG?

[AJien]

No, the only JTAG related function I'm using is Signal Tap.​

[Rahul_S_Intel1]

Hi , Can you please remove the JTAG pins and keep other pins in signal tap and test

[AJien]

Well, I started a brand new project with the same design files and the same settings and everything seems to work now. So maybe something in the .qsf is messed up.

Thanks for all your suggestions. 😊