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DAC5672 Sine output

Altera_Forum
Honored Contributor II
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Hi All, 

 

I am trying to generate a simple Sine wave from DAC5672 on my Hsmc daughter card from Terasic . The NCO i am using is from Open Cores , i works fine in simulation as shown in screen shot attached , But when i connect my scope probes i get distorted output screen shot attached . The DAC and NCO are provided with 100Mhz clock and the required output is 12Mhz , which is in my case is 12Mhz but distorted . 

 

When is connect a simple upcounter , i get a Saw tooth wave output as expected . 

 

Has anyone solved this problem ? is there something i am missing ?
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Altera_Forum
Honored Contributor II
1,133 Views

Seems like you're providing wrong input to the DAC. Check if it expects you to give it complement 1s input?

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Altera_Forum
Honored Contributor II
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I havent read anything about 14-bit inputs being 1's complement . 

The only mention about the inputs is given in the attached screen shot .
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Altera_Forum
Honored Contributor II
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The 14-bit digital data input fallows the offset positive binary coding scheme

 

 

Your turn to google now.
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Altera_Forum
Honored Contributor II
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Really great idea.

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Altera_Forum
Honored Contributor II
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Thanks for the guidance, now i need a VHDL function to convert 14-bit std_logic into off-set binary code, any ideas ?  

:)
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Altera_Forum
Honored Contributor II
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Strange question from FPGA guru :) Seems like You only need to change MSB according to the value... Google for TI DAC interfaces pdf, there's a good explanation and examples.

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Altera_Forum
Honored Contributor II
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Here's how i am changing values in VHDL 

 

ADJUSTING_OFFSET: PROCESS(sys_clk, sin_out_reg) 

BEGIN 

IF reset_n = '0' THEN 

sin_out_adj <= (others=>'0'); 

ELSIF rising_edge(sys_clk) THEN  

IF nco_sin_out(13) = '1' THEN  

sin_out_adj <= NOT(nco_sin_out)+"00000000000001"; 

ELSE  

sin_out_adj<= '1'& nco_sin_out(12 downto 0); 

END IF; 

END IF; 

-- END IF;  

END PROCESS; 

 

 

But i am not getting a clean sine wave out ?? the frequency of generated signal is correct 

 

see image attached
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Altera_Forum
Honored Contributor II
1,133 Views

 

--- Quote Start ---  

Here's how i am changing values in VHDL 

 

ADJUSTING_OFFSET: PROCESS(sys_clk, sin_out_reg) 

BEGIN 

IF reset_n = '0' THEN 

sin_out_adj <= (others=>'0'); 

ELSIF rising_edge(sys_clk) THEN  

IF nco_sin_out(13) = '1' THEN  

sin_out_adj <= NOT(nco_sin_out)+"00000000000001"; 

ELSE  

sin_out_adj<= '1'& nco_sin_out(12 downto 0); 

END IF; 

END IF; 

-- END IF;  

END PROCESS; 

 

 

But i am not getting a clean sine wave out ?? the frequency of generated signal is correct 

 

see image attached 

--- Quote End ---  

 

 

To change 2's complement to offset binary just invert the sign bit. 

sign_inv = not data(13); 

data <= sign_inv & data(12 downto 0); 

 

keep this combinatorial to avoid latency problems
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Altera_Forum
Honored Contributor II
1,133 Views

 

--- Quote Start ---  

Hi All, 

 

I am trying to generate a simple Sine wave from DAC5672 on my Hsmc daughter card from Terasic . The NCO i am using is from Open Cores , i works fine in simulation as shown in screen shot attached , But when i connect my scope probes i get distorted output screen shot attached . The DAC and NCO are provided with 100Mhz clock and the required output is 12Mhz , which is in my case is 12Mhz but distorted . 

 

When is connect a simple upcounter , i get a Saw tooth wave output as expected . 

 

Has anyone solved this problem ? is there something i am missing ? 

--- Quote End ---  

 

I can not send a private message to ask you a question. 

I'm in exactly the same situation how you have resolved the problem? 

my email yonatanhanann@gmail.com
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