DDR EMIF support 256bits data width for RDIMM x4?

[lidongyang]

Hi Intel,

Do you know how to create EMIF using qsys that support for 2 AXI masters with different data widths (256bits and 512bits) on RDIMM x4?

[AdzimZM_Intel]

Hello,

Thank you for submitting your question in Intel Community.

I'm Adzim will assist you in this forum.

"Do you know how to create EMIF using qsys that support for 2 AXI masters with different data widths (256bits and 512bits) on RDIMM x4?"

• I think it's possible by adding two modules for 256bits and 512bits and connect to EMIF memory controller.
• I don't think we provide the guideline to create this design but somehow you may ask based on IP or module usage.

Regards,

Adzim

[lidongyang]

Hi  Adzim,

I think the question should be:

We are using an organization x4 (dqs x4) RDIMM but cannot access by 256bit axi because of the byte-enable does not support organization x4.

To describe it in more detail:

Organization x4 means in qsys "EMIF" configuration "Memory" page, there is an option:

DQ pins per DQS group is 4. (we cannot change this value to

when the above value is 4, "data mask" and "Read DBI" cannot be enable.

if "data mask" and "Read DBI" cannot be enable, the ctrl_amm0 bus won't have amm_byteenable.

if amm_byteenable is not there. EMIF can only be accessed by 512bits.

Do we have a way to configure organization x4 RDIMM for 256bit axi access?

[AdzimZM_Intel]

Hello,

By default ctrl_amm_0 data width cannot be changed.

But you may able to create a generic component based on the EMIF IP so that you would be able to configure the data width to 256 bits.

I'm sharing a video link related to generic component as blackbox in Qsys: https://www.youtube.com/watch?v=mlTlGEXYpsU

Regards,

Adzim

[AdzimZM_Intel]

Hello,

Is there any futher question in this forum?

Regards,

Adzim

[lidongyang]

Please close this forum for now.

Thanks.

[AdzimZM_Intel]

I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.