Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

DE10-Nano JTAG

phiho
Beginner
1,146 Views

Greetings,

I am following the tutorial using JTAG to debug "blink" project:

https://software.intel.com/content/www/us/en/develop/articles/debug-intel-fpga-hardware-with-system-...

From the System Console Tcl:

% set d_path [lindex [get_service_paths device] 0 ]
/devices/5CSEBA6(.|ES)|5CSEMA6|..@2#USB-1#DE-SoC
% device_download_sof $d_path output_files/blink.sof

% set jd_path [lindex [get_service_paths jtag_debug] 0]

% jtag_debug_sense_clock $jd_path

error: jtag_debug_sense_clock: The path is not valid.
while executing
"jtag_debug_sense_clock $jd_path"
% jtag_debug_loop $jd_path [list 1 2 4 8 15 16]
error: jtag_debug_loop: The path is not valid.
while executing
"jtag_debug_loop $jd_path [list 1 2 4 8 15 16]"
%

I did install D2XX drivers from here:

https://www.ftdichip.com/Drivers/D2XX.htm

Please note that the first part completed successfully, The amber D5 CONFIG LED did come up:

<quote>
Program the Intel® FPGA
To program the Intel FPGA device, we first need to get a service path to the device. We will assign that path to a variable called d_path by typing the following command:

set d_path [lindex [get_service_paths device] 0 ]

Download the SOF file to the device by typing the following command:

device_download_sof $d_path output_files/blink.sof

The amber D5 CONFIG LED should be illuminated once the commands above complete
</quote>

Please advise if the JTAG is broken or did I miss something.

Regards,

phiho

0 Kudos
4 Replies
YuanLi_S_Intel
Employee
1,127 Views

Hi,


Is there any error message after you have executed "device_download_sof $d_path output_files/blink.sof"?


Can you check if the SOF file is actually in the folder?

Also, have you executed this command? get_service_paths device? Is there response from it? This is to determine is JTAG is connected properly.


Thank You.


Regards,

Bruce


0 Kudos
phiho
Beginner
1,125 Views

Hi Bruce,

 

Please read my posting again, I wrote in there:

 

Please note that the first part completed successfully, The amber D5 CONFIG LED did come up:

<quote>
Program the Intel® FPGA
To program the Intel FPGA device, we first need to get a service path to the device. We will assign that path to a variable called d_path by typing the following command:

set d_path [lindex [get_service_paths device] 0 ]

Download the SOF file to the device by typing the following command:

device_download_sof $d_path output_files/blink.sof

The amber D5 CONFIG LED should be illuminated once the commands above complete
</quote>

 

Regards,

 

phiho

 

0 Kudos
phiho
Beginner
1,122 Views

Hi Bruce,

 

Please find appended below the transcript of Tcl System Console and Messages window.

Please note that blink.soft was successfully downloaded.

Regards,

 

phiho

 

Here is the transcript of Tcl System Console:


% set d_path [lindex [get_service_paths device] 0 ]
/devices/5CSEBA6(.|ES)|5CSEMA6|..@2#USB-1#DE-SoC
% device_download_sof $d_path output_files/blink.sof

% set jd_path [lindex [get_service_paths jtag_debug] 0]

% jtag_debug_loop $jd_path [list 1 2 4 8 15 16]
error: jtag_debug_loop: The path is not valid.
while executing
"jtag_debug_loop $jd_path [list 1 2 4 8 15 16]"
%

and here are the messages:

Jan 18, 2021 7:38:17 AM com.altera.debug.core
SEVERE: wrong # args: should be "set varName ?newValue?"

Jan 18, 2021 7:38:17 AM com.altera.debug.core
SEVERE: while executing

Jan 18, 2021 7:38:17 AM com.altera.debug.core
SEVERE: "set env(IntelliJ IDEA Educational Edition) "G:\\IntelliJ-Edu-2020.2.4\\bin;""

Jan 18, 2021 7:38:17 AM com.altera.debug.core
INFO: Finished initialization

Jan 18, 2021 7:38:17 AM com.altera.debug.core
WARNING: Could not register IService packet

Jan 18, 2021 7:38:17 AM com.altera.debug.core
WARNING: A service named 'packet' is already registered.

Jan 18, 2021 7:38:18 AM com.altera.debug.core
INFO: Finished discovering JTAG connections

Jan 18, 2021 7:38:18 AM com.altera.debug.core
WARNING: FPGA does not contain SystemConsole USB soft logic (signature 0x00)

Jan 18, 2021 7:38:24 AM com.altera.debug.core
INFO: Finished discovering USB connections

Jan 18, 2021 7:38:24 AM com.altera.debug.core
INFO: Executing startup script G:\intel\fpga\lite\20.1\quartus\sopc_builder\system_console\scripts\system_console_rc.tcl

Jan 18, 2021 7:38:24 AM com.altera.debug.core
WARNING: The script doesn't exist: C:\Users\Administrator\system_console\system_console_rc.tcl. You can customize System Console by creating one.

Jan 18, 2021 7:38:24 AM com.altera.debug.core
SEVERE: wrong # args: should be "set varName ?newValue?"

Jan 18, 2021 7:38:24 AM com.altera.debug.core
SEVERE: while executing

Jan 18, 2021 7:38:24 AM com.altera.debug.core
SEVERE: "set env(IntelliJ IDEA Educational Edition) "G:\\IntelliJ-Edu-2020.2.4\\bin;""

Jan 18, 2021 7:39:41 AM com.altera.debug.core
INFO: Finished discovering JTAG connections

Jan 18, 2021 7:39:41 AM com.altera.debug.core
INFO: Auto linking 5CSEBA6(.|ES)|5CSEMA6|..@2#USB-1#DE-SoC to blink.sof

Jan 18, 2021 7:39:47 AM com.altera.debug.core
INFO: Finished discovering USB connections

Jan 18, 2021 7:41:32 AM com.altera.debug.core
SEVERE: jtag_debug_loop: The path is not valid.

 

0 Kudos
YuanLi_S_Intel
Employee
1,108 Views

May i know are you using USB Blaster I / II? If using II, can you change the TCK frequency to 6 MHz?


https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd06242013_922.html




Also, can you please confirm if the device part number is selected correctly in quartus before you compile the sof file?


0 Kudos
Reply