I am looking for the right primitive to act as a strong buffer for combinatorial logic block. The driven output of a NAND gate will be the input of many gates. In theory a logical-effort calculation can be done resulting in a buffer chain - the thing is I could not find any buffer other than LCELL (which comes with only a single size).
Would appreciate any thoughts,
I see your problem now, here's a reference of buffer primitives you can use: https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/mapIdTopics/jka1465579929642.h...
You should be aware that some of these buffer primitives aren't supported by the newer version of Quartus and Cyclone V devices, so you don't have much choices unfortunately.
You can refer to this document on how to use the buffer primitives: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_low_level.pdf
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