I am designing a board with MAX-10 FPGA. I can't find anywhere reliable comparison between true-LVDS and emulated-LVDS receive channels.
Are there differences between them in max bitrate? In margin?
What is the maximum achievable bitrate for LVDS RX in DDR mode for true and emulated LVDS inputs for -7 and -8-speed grades 10M50DCF256 devices?