Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20642 Discussions

E tile Dynamic reconfigration isssue

BQi
Beginner
377 Views

Customer use 1SM21BE2F55E2VG,quartus pro 19.3

According to user guide, they use embedded streamer to implement

E tile Dynamic reconfigration.

instantiated 4 channles GXT,Simplex, only receiver,100GE,it is OK

instantiated 4 channles GXT,Simplex, only receiver,28x4=112G OTN. it is OK

Because we don't know the end customer would plug into 100GE or 112G OTN, we have to implement 100GE and 112G OTN can switch automatic .

 

the attachement is the script. FYI

 

0 Kudos
4 Replies
BQi
Beginner
302 Views
posted a file.
0 Kudos
BQi
Beginner
302 Views

when we excute the script we found the daymic reconfig is fail. rx ready is suck to low, but 100GE and 112G OTN are both ok. ​

0 Kudos
BQi
Beginner
302 Views

The only need to do is change reference clock. change baud rate

0 Kudos
CheePin_C_Intel
Employee
302 Views

Hi,

 

As I understand it, you have some inquiries related to E Tile dynamic reconfiguration. To faciliate further debugging, just would like to check with you if you have had a chance to run Modelsim simulation with simple one CH design which perform the rate switch. This would be helpful to isolate any functional related issue before moving into hardware testing. Please feel free to share with me the test design and simulation files if simple one CH E-Tile design still observe similar rate switch issue.

 

Please let me know if there is any concern. Thank you.

 

 

Best regards,

Chee Pin

 

 

0 Kudos
Reply