I have arria 10 board. There is a PHY which connected to shared pins of SoC. RGMII interface is connected to third quadrant of shared pins and MDIO interface is connected to first quadrant of shared pins. I need to use hardware MAC in fpga. Is it possible to connect MDIO interface of hardware MAC by shared pins to the first quadrant(which is HPS connected) and RGMII interface through FPGA and third quadrant(which must be FPGA based) of shared pins?
Please read the Arria 10 SoC Device Design Guidelines section 4.5.1:
If you have further questions, let me know.