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I am attempting to program an EPM2210F256C5N using Quartus II ver 7.2 Web Edition with a Sunshine blaster. The chip is mounted on a BGA socket. The programming step goes well but the verification fails ("can't verify device number 1"). I have looked in the Altera knowledge base but with no luck. My JTAG connections (see attachment), seem to be OK judging by the fact that the programming step of the chip yields no errors. I placed 10pF caps on each of the JTAG lines to ground assuming noise but the problem is still there. I have tried different chips as well but no luck. Any help would be greatly appreciated.
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Your JTAG schematic is different from Altera recommendation as it misses the 1K TCK pulldown. This may cause unexpected JTAG behaviour.
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Thanks a lot for your reply. Where can I find the Altera suggested JTAG schematic? I've looked in the website as well as the chips documentation but with no luck.
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It's in the MAX II device handbook as well as in the Altera Configuration Handbook.
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Thanks a lot! Problem solved!

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