Enabling bridges - When and How ?

[rshal2]

I find the following warning:

"

Note: Before re-programming the FPGA fabric, make sure that the FPGA2HPS bridges (f2sdram, axi) are disabled, and that there is no software on HPS that may access the FPGA. This includes shutting down applications that access soft IP and also unloading any soft IP Linux kernel modules. Failure to do so will cause the system to behave in a non-deterministic way and most likely it will crash.

"

(in page wiki)

I do not understand when and why bridges should not be enabled and used from HPS.

Is it only when HPS load FPGA ? Is it only relevant for FPGA2HPS and not for HOS2FPGA ?

And if the cases where FPGA is configured independently from HPS, is the warning is not relevant ?

Thanks for any clarification,

ranran

[EBERLAZARE_I_Intel]

Hi ranran,

As mentioned "Before re-programming", thus this is to make sure all previous settings and configurations are disabled and shut down. So that if you decide to reprogrammed your design, it can configure accordingly without having previous settings and configuration affecting the design that you decide to re-programmed.

Regards.

[rshal2]

Hi,

I think the following page partly answers my question:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/embedded/2016/how-and-when-can-i-enable-the-fpga2sdram-bridge-on-cyclone-v-soc.html

If I understand correctly:

1. The warning in my original question is solved by just stopping HPS application (Right?)
2. enabling all bridge is done in preloader
3. fpga2sdram seems like a special bridge, which requires to be enabled only in certain state.

In our case fpga is configured independently from HPS, so we can't use the method of enabling this bridge as done in the above link.

I am still not sure how we can achieve this after preloader application starts in sdram,.

Thanks,

ran

[EBERLAZARE_I_Intel]

Hi,

1) Yes

2) The main responsibilities of the Preloader are:

• a.Perform additional HPS initialization
  • Bring up SDRAM
  • Load the next boot stage from Flash to SDRAM and jump to it

3) Yes

Here is Cyclone V SoC booting guide.

Regards.

[rshal2]

Hello,

We don't have bootloader, just running preloader and baremetal.

In such case how does fpga2sdram get enabled ?

Thank you

[EBERLAZARE_I_Intel]

Hi,

Okay, you can enable them from preloader as it checks the status of the FPGA and automatically enables bridges configured in Platform Designer (QSYS) and the BSP if the FPGA is configured.

Remember the "bridge_enable_handoff" command? This can be run from the U-boot command prompt to enable bridges. This command puts the HPS and SDRAM into a safe state before enabling all bridges after appropriate checks.

Regards.