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Error:Single ended input and differential output[IOBUF]

Altera_Forum
Honored Contributor II
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Hi,  

 

I am doing LVDS testing.. Getting input from counter block [for e.g. 4-bit] and passing that input to ALT_IOBUFF_differential. Passing that LVDS differential signal to Cyclone V board.  

 

I have tried with schematic block design [number of times :rolleyes: :confused:]. FOr me not working. So i need schematic design for my flow. Can anyone help me. i am stuck for many days.  

 

I can attach my schematic diagram but it is not visible. Thanks.
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