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I am using an Arria V, and I am trying to write a .pof file into Flash memory, so that the board can load the FPGA image from flash upon bootup. I add a CFI 1gb flash memory to the CPLD, but when I press start I get an error saying "Flash Loader IP Not loaded on device 2. Unexpected error in JTAG server -- error code 5. Operation failed." I was able to reflash the CPLD with the max5.pof file, so I know that the CPLD is correct. Does anybody know why this might be occurring?
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Does the max5.pof file contain the PFL IP? In order to program the CFI flash via the MAX V using JTAG, you need to include the PFL IP. You can refer to the PFL IP user guide in the link:
https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_pfl.pdf
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