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Hello, good afternoon, I am writing this post to ask a question about an error that I have when simulating my project, which is the use of PLLs, PLL intel fpga ip and PLL reconfig intel fpga ip, the project gave me an error when simulating it in model sim, I was able to solve this one but Due to how I solved it, another inconvenience arises, which is: the project is no longer portable because when I want to use it from another PC I have to re-route all the folders. I am attaching the mock script in which it gave me the error and I am also attaching the mock script in which I fixed the error and it let me simulate it. The question is how can I modify the mock script I made to fix the bug so that it is portable and can be used by someone else. Thank you very much in advance and I look forward to your responses.
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Hi,
Any further update or concern? Do you need any further help on this thread?
Thanks,
Best Regards
Sheng
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Hi,
Any further update or concern? Do you need any further help on this thread?
Thanks,
Best Regards
Sheng
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hello, good afternoon, I have a question when reconfiguring the pll reconfig to modify the value of the relog output. I want to know what the relationship between the counters and the relog output frequency is like, how do I realize what the frequency is from accounts made by accountants.
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