Ethernet Phy Fails to Link Between Marvell 88E111 PHY and Downstream port

[Buck0623]

I cannot seem to get a simple Marvell 88E111 PHY design to link to any external Ethernet port. Designing a prototype system with a Xilinx Ultra Scale FPGA. Embedded microprocessor only loaded with U-BOOT at this stage of development. Talking 1000BASE-X without clock, without auto negotiation to copper, (all of which I don't think should matter) except for the fact that I strapped the part interface as MIDO and U-BOOT only supports 2-wire out of the box. This leaves me welded to my configuration straps:

PHYADR [4:0] = 11110
ENA_PAUSE = 1
ANEG [3:0] 1111 = Auto Negotiate, advertise all capabilities, prefer slave
ENA_XC = 1, MDI crossover function is enabled
DIS_125 = 1, Disables 125MHz Clock

MODE [3:0] 0100 = SGMII without Clock with SGMII Auto-Neg to copper
DIS_FC = 0, Disables Fiber/Copper Auto Selection
DIS_SLEEP = 1, Disables Energy Detect
SEL_TWSI = 0, Select MDC/MDIO Interface
INT_POL = 1, INTn Signal is Active Low
75/50 Ohm = 0, 0 = 50 Ohm Termination for Fiber

2 mistakes I made (other than not including resistor options for the straps) is that I left TX_EN floating and assumed that the pins labeled TXD[7:0] were the transmit side (they are receive) of the unused GMII interface and left them floating RXD[7:0] it turns out are transmit, I pulled them up instead.

I have activity on the A pair and B pair to the downstream node. Some system I've plugged into flash the amber light, others show no lights at all.

The PHY is the bga version so reworking is major surgery. Since I don't know whether pulling up TX_EN and TXD[7:0] will fix the issue, I want to make sure I have exhausted all other avenues before punting. 

Thoughts?

[ZiYing_Intel]

Hi Per Moberg,

Thanks for submitting the issue.

Please do let me have some time to investigate on your case and I will be get back to you with findings.

Best regards,

Zi Ying

[ZiYing_Intel]

Hi Per Moberg,

According to the 88EE111 Datasheet, I found that in HWCFG_MODE[3:0] ’0000’, ’0100’, ’1000’, and ’1100’, RXD[3:2] can be used to indicate the copper link status. In this mode the LED_LINK10, LED_LINK100, and LED_LINK1000 pins cannot be used to indicate copper link status because the LED_LINK10, LED_LINK100, and LED_LINK1000 toggle during configuration.The RXD[3:2] pins must strictly indicate copper link status and not mirror the LED output. The link status will be real time status.

The definition of RXD[2] is 1 = Copper link down, 0 = Copper link up. The definition of RXD[3] is 0 = Copper link down, 1 = Copper link up.

In my opinion, you may try change the HWCFG_MODE[3:0] to the mode that can be used to indicate the copper link status and change the RXD[3:2] pins.

If above suggestion still not work, please do try to debug the problems according to the solution provided in below:

1. Please do ensure the cable is connected correctly.
2. Please do check whether you are using DHIP or static IP in your pc. If you are using DHCP, please try use a Static IP.
3. Please try adding a 100 clock cycle delay till drive the ethernet PHY reset line high when the board lights up.

Best regards,

Zi Ying

[ZiYing_Intel]

Hi Per Moberg,

I wish to follow up your case.

Do you still have any questions about this matter?

Else I would like to have your permission to close the case.

Best regards,

Zi Ying

[ZiYing_Intel]

Hi Per Moberg,

Since the case has been idle without further inquiries, I would like to close this case.

If you still have any inquiries, please do feel free to submit the issue.

Best regards,

Zi Ying