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Hi,
I'm designing with Cyclone 10 LP. In my design, I have a very simple platform which has NIOS II system, some SPI and UART, GPIO and Remote System Upgrade IP core. No customized VHDL IP core is used, which means all the controlling will be done in SW in NIOS II.
In the design, we need a external watchdog to reset the FPGA if the system get stuck. Now there are two options. Connect the watchdog to nConfig pin or connect the watchdog to nReset pin (The nReset pin is the reset input of the nios platform. ), which one is better?
If I connect it to nConfig pin, the watchdog would make the FPGA reconfiguration from the External flash. Since the Remote System Upgrade is designed, this means the factory image would be loaded (is it correct?), will it go to the correct application image later?
If I connect it to nReset pin, then the FPGA and SW would reset. Will this be sufficient?
Anybody can help me with this?
Thank you very much in advance!
Jasmine
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Hi Jasmine,
It will depend on your design an how critical the issue is. If you would like to have a faster reset and have the FPGA function then I would recommend to use the nReset pin.
If you are using nConfig pin it will reconfigure the FPGA to golden image and you will need to wait for it to reconfigure to application image before your design start to function.
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Hi Jasmine,
It will depend on your design an how critical the issue is. If you would like to have a faster reset and have the FPGA function then I would recommend to use the nReset pin.
If you are using nConfig pin it will reconfigure the FPGA to golden image and you will need to wait for it to reconfigure to application image before your design start to function.
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Hi,
Thank you very much for the answer, I got it.
With best wishes
Jasmine
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Hi,
I am glad that I am able to help.

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