One of the product has FPGA Cyclone 3 EP3C120 device.
It is observed on four different customer location around the world that CRC Error pin is asserting high continuously due to flipping of SRAM bits.Though after re-configuring the device with correct data bit values, the device is functioning correctly for all the cases,What are the possible reasons for the flipping of these SRAM bits?
Is there any known issue / Limitations that are causing this flipping of SRAM bits?
There will be CRC error occurring when there is Single Event Upset happening that cause the CRM bit to flipped.
You may refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyc3/cyc3_ciii51013.pdf for more information.