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FPGA Generic QUAD SPI Controller Core

relsaa
Beginner
142 Views

Hi 

I'm trying to read and write to Micron Flash MT25QL512ABB via Intel Generic QUAD SPI Controller IP on max10M50DAF with a custom PCB. (see schematics attached)

In order to verify a proper R/W operation I created a project (on Quartus 15.1) with the above IP and added an AXI to JTAG so I can test the IP on the Quartus System Console.

I was managed to read the status register but could not write properly to the devise and all read commands gave 0xffffffff.

In order to verify my commands are valid I exported my design to MAX10 FPGA Development Kit and used similar commands to read and write successfully to a Micron Flash N25Q512A. so I guess my commands are valid.

at this point I suspected the QUAD SPI Controller IP doesn't really support the MT25QL512ABB (even though the flash is listed under the IP support) so I compiled my design on Quartus 22.1 and updated the IP to Generic QUAD SPI Controller II Core. to my surprise the compilation failed with those 2 errors:

1. Error (15856): Output port O of I/O output buffer "pre_syn.bp.o1_QSPI_CLK~output" must drive a top-level pin

2. Error (15856): Output port O of I/O output buffer "pre_syn.bp.o1_QSPI_CSn~output" must drive a top-level pin

those pins are connected connected all the way to the top level pins.

I tried to search for those signals in the netlist viewer but didn't find those.

also I'm getting those warnings:

Warning (14632): Output pin "pre_syn.bp.o1_QSPI_DQ0" driven by bidirectional pin "QSPI_DQ0" cannot be tri-stated
Warning (14632): Output pin "pre_syn.bp.o1_QSPI_DQ1" driven by bidirectional pin "QSPI_DQ1" cannot be tri-stated
Warning (14632): Output pin "pre_syn.bp.o1_QSPI_DQ2" driven by bidirectional pin "QSPI_DQ2" cannot be tri-stated
Warning (14632): Output pin "pre_syn.bp.o1_QSPI_DQ3" driven by bidirectional pin "QSPI_DQ3" cannot be tri-stated

Please advise

thanks

0 Kudos
1 Solution
relsaa
Beginner
89 Views

Hi Aiman

Thank you for your fast reply!

I realized that the errors I got were due to SignalTap usage on those QSPI pins. after I removed the signaltap from the project this issue resolved.

Then I re-tested my Flash with the Generic QUAD SPI Controller II Core and was able to read and write successfully.

You may close this case now.

 

Thank you for your support.

 

 

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3 Replies
NurAiman_M_Intel
Employee
108 Views

Hi,


Thank you for contacting Intel community.


For 3rd party flash, kindly use Generic Serial Flash Interface Intel® FPGA IP


https://www.intel.com/content/www/us/en/docs/programmable/683419/21-2-20-1-1/user-guide.html


Regards,

Aiman


relsaa
Beginner
90 Views

Hi Aiman

Thank you for your fast reply!

I realized that the errors I got were due to SignalTap usage on those QSPI pins. after I removed the signaltap from the project this issue resolved.

Then I re-tested my Flash with the Generic QUAD SPI Controller II Core and was able to read and write successfully.

You may close this case now.

 

Thank you for your support.

 

 

NurAiman_M_Intel
Employee
77 Views

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


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